e9dd54ed1c
When a eSPI slave needs to send back-to-back packets updating status signal need to guarantee both status reach the eSPI host, i.e. SCI=0 followed by SCI=1. This change guarantees both packets are transmitted over esSPI bus. Allow to map eSPI host logical UART to a soc UART. Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com> |
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| .. | ||
| CMakeLists.txt | ||
| espi_mchp_xec.c | ||
| espi_utils.h | ||
| Kconfig | ||
| Kconfig.xec | ||