zephyr/soc
David Leach a09ba37334 MXRT600: Fix secure/non-secure definition for FLEXSPI
The Flexspi memory address defines the location of the externally
attached flash to the MXRT600 based board. The flexspi has two
different memory spaces for secure and non-secure access that are
not aligned for the Flexspi register space and the memory map
address space. The normal method of handling this via the two
different dts files for secure/non-secure is not able to handle
this because a base address is applied uniformly across multiple
reg items.

Changes include:

- pull flexspi out of peripherals block to allow it to be explicitly
expressed in the respective secure/non-secure SOC DTS files.
- move the flash size definition to the board level definition and
use the size of the actual flash device found on the board.
:
Signed-off-by: David Leach <david.leach@nxp.com>
2021-11-18 14:29:53 +01:00
..
arc boards: arc: add a nsim_hs_mpuv6 board simulator 2021-08-27 11:45:43 -04:00
arm MXRT600: Fix secure/non-secure definition for FLEXSPI 2021-11-18 14:29:53 +01:00
arm64 xenvm: switch to Xen PV console instead of PL011 SBSA 2021-10-29 15:23:33 +02:00
nios2
posix posix: Add missing include 2021-04-27 13:17:36 -04:00
riscv ITE: drivers/serial: add the UART driver for the PM callback function 2021-11-16 21:23:42 -05:00
sparc
x86 bluetooth: remove Kconfig options CONFIG_BT_*_ON_DEV_NAME 2021-08-25 18:05:17 -04:00
xtensa soc: intel_adsp/cavs_v20: correct linker syntax for old binutils 2021-11-16 10:13:46 -05:00
Kconfig kconfig: soc and shield cleanup 2021-06-11 16:13:22 +02:00