Anisetti Avinash Krishna c65f1f50ed boards: intel: rpl: Added revisions for RPL-s board ... Added 2 different revisions of RPL-s board with 2 PCH options 600 series and 700 series. Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>		2025-05-09 01:40:09 +02:00
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adl	boards: intel: Updated TSC frequency values	2025-04-07 11:22:45 +02:00
adsp
btl	boards: intel: btl: use zephyr board sphinx directives	2025-04-14 16:08:06 +02:00
common
ehl
ish
niosv_g	boards: align vendor entry in board.yml files	2025-04-29 02:41:53 +02:00
niosv_m	boards: align vendor entry in board.yml files	2025-04-29 02:41:53 +02:00
rpl	boards: intel: rpl: Added revisions for RPL-s board	2025-05-09 01:40:09 +02:00
socfpga	boards: align vendor entry in board.yml files	2025-04-29 02:41:53 +02:00
socfpga_std/cyclonev_socdk	boards: align vendor entry in board.yml files	2025-04-29 02:41:53 +02:00
index.rst