zephyr/arch/arm/core
Mathieu Choplain 77378a8c75 arch: arm: pm_s2ram: fix compatibility with ARMv6-M again
The original 'arch_pm_s2ram_resume' implementation saved lr on the stack
using 'push {lr}' and restored it using 'pop {lr}'. However, the Thumb-1
'pop' does not support lr as a target register, so this code would not
compile for ARMv6-M or ARMv8-M Baseline. r0 was added to these push/pop
later in 2590c48d40.

In 474d4c3249, arch_pm_s2ram* functions were
modified to no longer use the stack, which incidentally "fixed" this issue.
b4fb5d38eb reverted this commit and brought
back 'pop {r0, lr}' as-is, without taking compatibility into account.

Modify the sequence to use "pop {r0, pc}" which is supported on all
ARM M-profile implementations (v6/v7/v8 Baseline/v8 Mainline), and
add comments to (hopefully) prevent this issue from re-appearing.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-05-13 17:46:40 +02:00
..
cortex_a_r arch: arm: cortex_a_r: Fix memory corruption when disabling dcache 2025-05-13 17:46:28 +02:00
cortex_m arch: arm: pm_s2ram: fix compatibility with ARMv6-M again 2025-05-13 17:46:40 +02:00
mmu arch: arm: Replaced __volatile__ with volatile 2025-03-17 16:24:51 +01:00
mpu arch: arm: arm_mpu_v7m: Fix unsupported Cortex-R access permission mode 2025-05-13 17:44:40 +02:00
offsets
__aeabi_atexit.c
CMakeLists.txt
elf.c llext: Add parameters to arch_elf_relocate 2025-03-07 19:44:54 +01:00
fatal.c
gdbstub.c
header.S
irq_offload.c
Kconfig arch: add dependencie for CONFIG_SRAM_VECTOR_TABLE 2025-04-25 11:03:54 +02:00
Kconfig.vfp
nmi_on_reset.S
nmi.c
swi_tables.ld
tls.c toolchain: iar: tls: no tls pointer offset in IAR 2025-02-14 19:12:44 +00:00
userspace.S
vector_table.ld
zimage_header.ld