zephyr/soc/xtensa/intel_apl_adsp
Daniel Leung 7b31f93980 xtensa: enable XTENSA_HAL at SoC level
This moves enabling XTENSA_HAL to the SoC definitions.
As Xtensa SoCs are highly configurable, it is possible
that the generic Xtensa HAL provided in the tree is
not suitable. So only enable XTENSA_HAL only if
the generic version can be used.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-08 13:10:35 -07:00
..
include soc: intel_apl_adsp: add multi-processing support 2020-03-25 19:07:28 -04:00
adsp.c
CMakeLists.txt soc: intel_apl_adsp: add multi-processing support 2020-03-25 19:07:28 -04:00
dts_fixup.h soc: xtensa: Convert to new DT_INST macros 2020-03-27 10:06:14 -05:00
Kconfig.defconfig soc: intel_apl_adsp: add multi-processing support 2020-03-25 19:07:28 -04:00
Kconfig.soc xtensa: enable XTENSA_HAL at SoC level 2020-04-08 13:10:35 -07:00
linker.ld soc: intel_apl_adsp: add multi-processing support 2020-03-25 19:07:28 -04:00
main_entry.S
memory.h
soc_mp.c soc: xtensa: Convert to new DT_INST macros 2020-03-27 10:06:14 -05:00
soc.c
soc.h soc: intel_apl_adsp: add multi-processing support 2020-03-25 19:07:28 -04:00