In the current implementation both SPSR and ELR registers are saved with the callee-saved registers and restored by the context-switch routine. To support nested IRQs we have to save those on the stack when entering and exiting from an ISR. Since the values are now carried on the stack we can now add those to the ESF and the initial stack and take care to restore them for new threads using the new thread wrapper routine. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
44 lines
728 B
C
44 lines
728 B
C
/*
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* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Cortex-A public exception handling
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*
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* ARM-specific kernel exception handling interface. Included by arm64/arch.h.
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_EXC_H_
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#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_EXC_H_
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/* for assembler, only works with constants */
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#ifdef _ASMLANGUAGE
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#else
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#include <zephyr/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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struct __esf {
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struct __basic_sf {
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u64_t regs[20];
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u64_t spsr;
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u64_t elr;
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} basic;
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};
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typedef struct __esf z_arch_esf_t;
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_EXC_H_ */
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