The set of interrupt stacks is now expressed as an array. We also define the idle threads and their associated stacks this way. This allows for iteration in cases where we have multiple CPUs. There is now a centralized declaration in kernel_internal.h. On uniprocessor systems, z_interrupt_stacks has one element and can be used in the same way as _interrupt_stack. The IRQ stack for CPU 0 is now set in init.c instead of in arch code. The extern definition of the main thread stack is now removed, this doesn't need to be in a header. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
378 lines
8.9 KiB
C
378 lines
8.9 KiB
C
/*
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* Copyright (c) 2019 Intel Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <ksched.h>
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#include <kernel_structs.h>
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#include <kernel_internal.h>
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#include <exc_handle.h>
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#include <logging/log.h>
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LOG_MODULE_DECLARE(os);
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#if defined(CONFIG_BOARD_QEMU_X86) || defined(CONFIG_BOARD_QEMU_X86_64)
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FUNC_NORETURN void arch_system_halt(unsigned int reason)
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{
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ARG_UNUSED(reason);
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/* Causes QEMU to exit. We passed the following on the command line:
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* -device isa-debug-exit,iobase=0xf4,iosize=0x04
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*/
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sys_out32(0, 0xf4);
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CODE_UNREACHABLE;
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}
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#endif
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static inline uintptr_t esf_get_sp(const z_arch_esf_t *esf)
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{
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#ifdef CONFIG_X86_64
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return esf->rsp;
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#else
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return esf->esp;
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#endif
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}
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static inline uintptr_t esf_get_code(const z_arch_esf_t *esf)
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{
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#ifdef CONFIG_X86_64
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return esf->code;
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#else
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return esf->errorCode;
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#endif
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}
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#ifdef CONFIG_THREAD_STACK_INFO
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bool z_x86_check_stack_bounds(uintptr_t addr, size_t size, u16_t cs)
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{
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uintptr_t start, end;
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if (arch_is_in_isr()) {
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/* We were servicing an interrupt */
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int cpu_id;
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#ifdef CONFIG_SMP
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cpu_id = arch_curr_cpu()->id;
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#else
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cpu_id = 0;
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#endif
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start = (uintptr_t)Z_THREAD_STACK_BUFFER(
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z_interrupt_stacks[cpu_id]);
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end = start + CONFIG_ISR_STACK_SIZE;
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} else if ((cs & 0x3U) != 0U ||
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(_current->base.user_options & K_USER) == 0) {
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/* Thread was in user mode, or is not a user mode thread.
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* The normal stack buffer is what we will check.
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*/
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start = _current->stack_info.start;
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end = STACK_ROUND_DOWN(_current->stack_info.start +
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_current->stack_info.size);
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} else {
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/* User thread was doing a syscall, check kernel stack bounds */
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start = _current->stack_info.start - MMU_PAGE_SIZE;
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end = _current->stack_info.start;
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}
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return (addr <= start) || (addr + size > end);
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}
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#endif
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#ifdef CONFIG_EXCEPTION_DEBUG
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#if defined(CONFIG_X86_EXCEPTION_STACK_TRACE)
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struct stack_frame {
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uintptr_t next;
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uintptr_t ret_addr;
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#ifndef CONFIG_X86_64
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uintptr_t args;
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#endif
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};
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#define MAX_STACK_FRAMES 8
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static void unwind_stack(uintptr_t base_ptr, u16_t cs)
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{
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struct stack_frame *frame;
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int i;
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if (base_ptr == 0U) {
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LOG_ERR("NULL base ptr");
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return;
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}
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for (i = 0; i < MAX_STACK_FRAMES; i++) {
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if (base_ptr % sizeof(base_ptr) != 0U) {
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LOG_ERR("unaligned frame ptr");
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return;
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}
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frame = (struct stack_frame *)base_ptr;
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if (frame == NULL) {
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break;
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}
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#ifdef CONFIG_THREAD_STACK_INFO
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/* Ensure the stack frame is within the faulting context's
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* stack buffer
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*/
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if (z_x86_check_stack_bounds((uintptr_t)frame,
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sizeof(*frame), cs)) {
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LOG_ERR(" corrupted? (bp=%p)", frame);
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break;
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}
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#endif
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if (frame->ret_addr == 0U) {
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break;
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}
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#ifdef CONFIG_X86_64
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LOG_ERR(" 0x%016lx", frame->ret_addr);
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#else
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LOG_ERR(" 0x%08lx (0x%lx)", frame->ret_addr, frame->args);
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#endif
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base_ptr = frame->next;
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}
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}
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#endif /* CONFIG_X86_EXCEPTION_STACK_TRACE */
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#ifdef CONFIG_X86_64
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static void dump_regs(const z_arch_esf_t *esf)
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{
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LOG_ERR("RAX: 0x%016lx RBX: 0x%016lx RCX: 0x%016lx RDX: 0x%016lx",
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esf->rax, esf->rbx, esf->rcx, esf->rdx);
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LOG_ERR("RSI: 0x%016lx RDI: 0x%016lx RBP: 0x%016lx RSP: 0x%016lx",
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esf->rsi, esf->rdi, esf->rbp, esf->rsp);
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LOG_ERR(" R8: 0x%016lx R9: 0x%016lx R10: 0x%016lx R11: 0x%016lx",
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esf->r8, esf->r9, esf->r10, esf->r11);
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LOG_ERR("R12: 0x%016lx R13: 0x%016lx R14: 0x%016lx R15: 0x%016lx",
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esf->r12, esf->r13, esf->r14, esf->r15);
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LOG_ERR("RSP: 0x%016lx RFLAGS: 0x%016lx CS: 0x%04lx CR3: %p", esf->rsp,
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esf->rflags, esf->cs & 0xFFFFU, z_x86_page_tables_get());
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#ifdef CONFIG_X86_EXCEPTION_STACK_TRACE
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LOG_ERR("call trace:");
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#endif
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LOG_ERR("RIP: 0x%016lx", esf->rip);
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#ifdef CONFIG_X86_EXCEPTION_STACK_TRACE
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unwind_stack(esf->rbp, esf->cs);
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#endif
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}
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#else /* 32-bit */
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static void dump_regs(const z_arch_esf_t *esf)
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{
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LOG_ERR("EAX: 0x%08x, EBX: 0x%08x, ECX: 0x%08x, EDX: 0x%08x",
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esf->eax, esf->ebx, esf->ecx, esf->edx);
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LOG_ERR("ESI: 0x%08x, EDI: 0x%08x, EBP: 0x%08x, ESP: 0x%08x",
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esf->esi, esf->edi, esf->ebp, esf->esp);
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LOG_ERR("EFLAGS: 0x%08x CS: 0x%04x CR3: %p", esf->eflags,
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esf->cs & 0xFFFFU, z_x86_page_tables_get());
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#ifdef CONFIG_X86_EXCEPTION_STACK_TRACE
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LOG_ERR("call trace:");
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#endif
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LOG_ERR("EIP: 0x%08x", esf->eip);
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#ifdef CONFIG_X86_EXCEPTION_STACK_TRACE
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unwind_stack(esf->ebp, esf->cs);
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#endif
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}
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#endif /* CONFIG_X86_64 */
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static void log_exception(uintptr_t vector, uintptr_t code)
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{
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switch (vector) {
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case IV_DIVIDE_ERROR:
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LOG_ERR("Divide by zero");
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break;
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case IV_DEBUG:
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LOG_ERR("Debug");
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break;
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case IV_NON_MASKABLE_INTERRUPT:
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LOG_ERR("Non-maskable interrupt");
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break;
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case IV_BREAKPOINT:
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LOG_ERR("Breakpoint");
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break;
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case IV_OVERFLOW:
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LOG_ERR("Overflow");
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break;
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case IV_BOUND_RANGE:
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LOG_ERR("Bound range exceeded");
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break;
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case IV_INVALID_OPCODE:
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LOG_ERR("Invalid opcode");
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break;
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case IV_DEVICE_NOT_AVAILABLE:
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LOG_ERR("Floating point unit device not available");
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break;
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case IV_DOUBLE_FAULT:
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LOG_ERR("Double fault (code 0x%lx)", code);
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break;
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case IV_COPROC_SEGMENT_OVERRUN:
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LOG_ERR("Co-processor segment overrun");
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break;
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case IV_INVALID_TSS:
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LOG_ERR("Invalid TSS (code 0x%lx)", code);
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break;
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case IV_SEGMENT_NOT_PRESENT:
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LOG_ERR("Segment not present (code 0x%lx)", code);
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break;
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case IV_STACK_FAULT:
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LOG_ERR("Stack segment fault");
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break;
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case IV_GENERAL_PROTECTION:
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LOG_ERR("General protection fault (code 0x%lx)", code);
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break;
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/* IV_PAGE_FAULT skipped, we have a dedicated handler */
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case IV_X87_FPU_FP_ERROR:
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LOG_ERR("x87 floating point exception");
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break;
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case IV_ALIGNMENT_CHECK:
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LOG_ERR("Alignment check (code 0x%lx)", code);
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break;
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case IV_MACHINE_CHECK:
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LOG_ERR("Machine check");
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break;
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case IV_SIMD_FP:
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LOG_ERR("SIMD floating point exception");
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break;
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case IV_VIRT_EXCEPTION:
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LOG_ERR("Virtualization exception");
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break;
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case IV_SECURITY_EXCEPTION:
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LOG_ERR("Security exception");
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break;
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default:
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break;
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}
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}
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/* Page fault error code flags */
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#define PRESENT BIT(0)
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#define WR BIT(1)
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#define US BIT(2)
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#define RSVD BIT(3)
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#define ID BIT(4)
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#define PK BIT(5)
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#define SGX BIT(15)
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static void dump_page_fault(z_arch_esf_t *esf)
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{
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uintptr_t err, cr2;
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/* See Section 6.15 of the IA32 Software Developer's Manual vol 3 */
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__asm__ ("mov %%cr2, %0" : "=r" (cr2));
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err = esf_get_code(esf);
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LOG_ERR("Page fault at address 0x%lx (error code 0x%lx)", cr2, err);
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if ((err & RSVD) != 0) {
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LOG_ERR("Reserved bits set in page tables");
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} else if ((err & PRESENT) == 0) {
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LOG_ERR("Linear address not present in page tables");
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} else {
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LOG_ERR("Access violation: %s thread not allowed to %s",
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(err & US) != 0U ? "user" : "supervisor",
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(err & ID) != 0U ? "execute" : ((err & WR) != 0U ?
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"write" :
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"read"));
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if ((err & PK) != 0) {
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LOG_ERR("Protection key disallowed");
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} else if ((err & SGX) != 0) {
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LOG_ERR("SGX access control violation");
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}
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}
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#ifdef CONFIG_X86_MMU
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z_x86_dump_mmu_flags(z_x86_thread_page_tables_get(_current), cr2);
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#endif /* CONFIG_X86_MMU */
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}
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#endif /* CONFIG_EXCEPTION_DEBUG */
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FUNC_NORETURN void z_x86_fatal_error(unsigned int reason,
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const z_arch_esf_t *esf)
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{
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#ifdef CONFIG_EXCEPTION_DEBUG
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if (esf != NULL) {
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dump_regs(esf);
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}
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#endif
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z_fatal_error(reason, esf);
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CODE_UNREACHABLE;
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}
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FUNC_NORETURN void z_x86_unhandled_cpu_exception(uintptr_t vector,
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const z_arch_esf_t *esf)
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{
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#ifdef CONFIG_EXCEPTION_DEBUG
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log_exception(vector, esf_get_code(esf));
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#else
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ARG_UNUSED(vector);
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#endif
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z_x86_fatal_error(K_ERR_CPU_EXCEPTION, esf);
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}
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#ifdef CONFIG_USERSPACE
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Z_EXC_DECLARE(z_x86_user_string_nlen);
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static const struct z_exc_handle exceptions[] = {
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Z_EXC_HANDLE(z_x86_user_string_nlen)
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};
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#endif
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void z_x86_page_fault_handler(z_arch_esf_t *esf)
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{
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#ifdef CONFIG_USERSPACE
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int i;
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for (i = 0; i < ARRAY_SIZE(exceptions); i++) {
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#ifdef CONFIG_X86_64
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if ((void *)esf->rip >= exceptions[i].start &&
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(void *)esf->rip < exceptions[i].end) {
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esf->rip = (u64_t)(exceptions[i].fixup);
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return;
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}
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#else
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if ((void *)esf->eip >= exceptions[i].start &&
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(void *)esf->eip < exceptions[i].end) {
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esf->eip = (unsigned int)(exceptions[i].fixup);
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return;
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}
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#endif /* CONFIG_X86_64 */
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}
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#endif
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#ifdef CONFIG_EXCEPTION_DEBUG
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dump_page_fault(esf);
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#endif
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#ifdef CONFIG_THREAD_STACK_INFO
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if (z_x86_check_stack_bounds(esf_get_sp(esf), 0, esf->cs)) {
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z_x86_fatal_error(K_ERR_STACK_CHK_FAIL, esf);
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}
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#endif
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z_x86_fatal_error(K_ERR_CPU_EXCEPTION, esf);
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CODE_UNREACHABLE;
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}
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void z_x86_do_kernel_oops(const z_arch_esf_t *esf)
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{
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uintptr_t reason;
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#ifdef CONFIG_X86_64
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reason = esf->rax;
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#else
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uintptr_t *stack_ptr = (uintptr_t *)esf->esp;
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reason = *stack_ptr;
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#endif
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#ifdef CONFIG_USERSPACE
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/* User mode is only allowed to induce oopses and stack check
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* failures via this software interrupt
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*/
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if ((esf->cs & 0x3) != 0 && !(reason == K_ERR_KERNEL_OOPS ||
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reason == K_ERR_STACK_CHK_FAIL)) {
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reason = K_ERR_KERNEL_OOPS;
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}
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#endif
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z_x86_fatal_error(reason, esf);
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}
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