zephyr/arch/common
Stephanos Ioannidis cdbfbe396f tests: benchmarks: Fix incorrect ARM arch variant check
Currently, the Cortex-M SysTick-based timing info implementation is
incorrectly specified for all 32-bit ARM architectures.

This commit fixes that by restricting the SysTick-based implementation
to the ARM Cortex-M architectures only; in addition, it removes the
ARM64 timing info implementation as it is identical to the default
generic implementation and was previously added only as a workaround
for the aforementioned problem.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-15 15:49:27 +02:00
..
CMakeLists.txt arch: common: Delete isr_tables.ld which was a copy of intlist.ld 2020-01-30 14:19:14 -05:00
gen_isr_tables.py gen_isr_tables: Improve error message 2020-01-29 14:21:00 -08:00
isr_tables.c isr_tables: Support hardware interrupt vector table-only configuration. 2020-03-13 12:02:03 +01:00
nocache.ld arch: common: nocache: fix linker section definition 2019-06-19 09:08:40 -07:00
ramfunc.ld arch: Port the ramfunc section to the Cmake function 2019-05-20 22:28:28 -04:00
sw_isr_common.c arch: isr: Update z_isr_install for multi-level interrupts 2020-04-09 13:12:24 -07:00
text_section_offset.ld arm, x86, riscv: linker.ld: Move TEXT_SECTION_OFFSET 2019-12-20 08:54:53 -05:00
timing_info_bench.c tests: benchmarks: Fix incorrect ARM arch variant check 2020-04-15 15:49:27 +02:00