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zephyr/boards/qemu
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Anas Nashif f29ae72d79 kernel: rename 'dumb' scheduler and simply call it 'simple' 
Improve naming of the scheduler and call it what it is: simple. Using
'dumb' for the default scheduler algorithm in Zephyr is a bad idea.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-03-15 00:34:58 +01:00
..
arc boards: twister: update boards' twister metadata files 2024-11-25 08:31:28 +01:00
cortex_a9 boards: Remove 'xtools' toolchain variant references 2025-01-17 10:50:07 +01:00
cortex_a53 boards: add missing ram/flash entries to board .yaml 2025-02-05 21:02:33 +01:00
cortex_m0 boards: Remove 'xtools' toolchain variant references 2025-01-17 10:50:07 +01:00
cortex_m3 boards: Remove 'xtools' toolchain variant references 2025-01-17 10:50:07 +01:00
cortex_r5 boards: Remove 'xtools' toolchain variant references 2025-01-17 10:50:07 +01:00
kvm_arm64 boards: qemu: adopt new zephyr:board directive and role 2024-10-24 17:51:15 +02:00
leon3 boards: Remove 'xtools' toolchain variant references 2025-01-17 10:50:07 +01:00
malta boards: Remove 'xtools' toolchain variant references 2025-01-17 10:50:07 +01:00
nios2 boards: Remove 'xtools' toolchain variant references 2025-01-17 10:50:07 +01:00
riscv32 qemu/riscv: define RAM and Flash sizes 2025-02-24 20:19:29 +00:00
riscv32_xip boards: Remove 'xtools' toolchain variant references 2025-01-17 10:50:07 +01:00
riscv32e qemu/riscv: define RAM and Flash sizes 2025-02-24 20:19:29 +00:00
riscv64 qemu/riscv: define RAM and Flash sizes 2025-02-24 20:19:29 +00:00
x86 kernel: rename 'dumb' scheduler and simply call it 'simple' 2025-03-15 00:34:58 +01:00
xtensa boards/qemu/xtensa: fix DCACHE_LINE_SIZE value for sample_controller32 2025-02-13 13:22:14 +01:00
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