STM32 I2S driver implementation. It has been designed in the most
generic way possible, with the possibility of using it in master/slave
and rx/tx mode. Currenty it has been tested for master rx mode only
using the microphone on ArgonKey board.
The configuration file permits to compile it for STM32F4xx product
family only, but it should be easy to extend it also for other
families.
It supports all 5 STM32F4xx I2S controllers (I2S 1/4/5 on APB2 and
I2S 2/3 on APB1).
It makes uses of the available DMA channels for rx/tx streams.
The clock source can be selected among one of the following two choices:
- PLLI2S pll, with possibility to configure PLLM/PLLN/PLLR
- HSE/HSI clock
Interrupt is triggered only in case of errors (FRM/OVR/UDR).
Signed-off-by: Armando Visconti <armando.visconti@st.com>
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