zephyr/arch
Charles E. Youse 90bf0da332 arch/x86: (Intel64) optimize and re-order startup assembly sequence
In some places the code was being overly pedantic; e.g., there is no
need to load our own 32-bit descriptors because the loader's are fine
for our purposes. We can defer loading our own segments until 64-bit.

The sequence is re-ordered to faciliate code sharing between the BSP
and APs when SMP is enabled (all BSP-specific operations occur before
the per-CPU initialization).

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-10-07 19:46:55 -04:00
..
arc arch: arc: fix the bug in prologue of sys call handling 2019-10-01 09:22:30 -04:00
arm arm: arch code naming cleanup 2019-10-04 10:46:23 +02:00
common timing_info: rename globals 2019-09-30 15:25:55 -04:00
nios2 kernel: add arch abstraction for irq_offload() 2019-10-01 11:11:42 +02:00
posix cmake: toolchain abstraction for undefined behaviour sanitizer 2019-10-07 15:00:20 +02:00
riscv kernel: add arch abstraction for irq_offload() 2019-10-01 11:11:42 +02:00
x86 arch/x86: (Intel64) optimize and re-order startup assembly sequence 2019-10-07 19:46:55 -04:00
x86_64 kernel: add arch abstraction for irq_offload() 2019-10-01 11:11:42 +02:00
xtensa kernel: add arch abstraction for irq_offload() 2019-10-01 11:11:42 +02:00
CMakeLists.txt license: cleanup: add SPDX Apache-2.0 license identifier 2019-04-07 08:45:22 -04:00
Kconfig kconfig: Convert device tree chosen properties to new kconfigfunctions 2019-09-13 11:42:34 -05:00