ac74d8b652
Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
54 lines
2.1 KiB
C
54 lines
2.1 KiB
C
/* spi_intel.h - Intel's SPI controller driver utilities */
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/*
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* Copyright (c) 2015 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __SPI_INTEL_H__
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#define __SPI_INTEL_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* SPI Maximum supported system frequencies */
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#define SPI_MAX_CLK_FREQ_25MHZ ((0x800000 << 8))
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#define SPI_MAX_CLK_FREQ_20MHz ((0x666666 << 8) | 1)
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#define SPI_MAX_CLK_FREQ_166667KHZ ((0x800000 << 8) | 2)
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#define SPI_MAX_CLK_FREQ_13333KHZ ((0x666666 << 8) | 2)
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#define SPI_MAX_CLK_FREQ_12500KHZ ((0x200000 << 8))
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#define SPI_MAX_CLK_FREQ_10MHZ ((0x800000 << 8) | 4)
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#define SPI_MAX_CLK_FREQ_8MHZ ((0x666666 << 8) | 4)
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#define SPI_MAX_CLK_FREQ_6250HZ ((0x400000 << 8) | 3)
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#define SPI_MAX_CLK_FREQ_5MHZ ((0x400000 << 8) | 4)
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#define SPI_MAX_CLK_FREQ_4MHZ ((0x666666 << 8) | 9)
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#define SPI_MAX_CLK_FREQ_3125KHZ ((0x80000 << 8))
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#define SPI_MAX_CLK_FREQ_2500KHZ ((0x400000 << 8) | 9)
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#define SPI_MAX_CLK_FREQ_2MHZ ((0x666666 << 8) | 19)
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#define SPI_MAX_CLK_FREQ_1563KHZ ((0x40000 << 8))
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#define SPI_MAX_CLK_FREQ_1250KHZ ((0x200000 << 8) | 9)
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#define SPI_MAX_CLK_FREQ_1MHZ ((0x400000 << 8) | 24)
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#define SPI_MAX_CLK_FREQ_800KHZ ((0x666666 << 8) | 49)
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#define SPI_MAX_CLK_FREQ_781KHZ ((0x20000 << 8))
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#define SPI_MAX_CLK_FREQ_625KHZ ((0x200000 << 8) | 19)
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#define SPI_MAX_CLK_FREQ_500KHZ ((0x400000 << 8) | 49)
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#define SPI_MAX_CLK_FREQ_400KHZ ((0x666666 << 8) | 99)
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#define SPI_MAX_CLK_FREQ_390KHZ ((0x10000 << 8))
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#define SPI_MAX_CLK_FREQ_250KHZ ((0x400000 << 8) | 99)
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#define SPI_MAX_CLK_FREQ_200KHZ ((0x666666 << 8) | 199)
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#define SPI_MAX_CLK_FREQ_195KHZ ((0x8000 << 8))
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#define SPI_MAX_CLK_FREQ_125KHZ ((0x100000 << 8) | 49)
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#define SPI_MAX_CLK_FREQ_100KHZ ((0x200000 << 8) | 124)
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#define SPI_MAX_CLK_FREQ_50KHZ ((0x100000 << 8) | 124)
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#define SPI_MAX_CLK_FREQ_20KHZ ((0x80000 << 8) | 124)
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#define SPI_MAX_CLK_FREQ_10KHZ ((0x20000 << 8) | 77)
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#define SPI_MAX_CLK_FREQ_5KHZ ((0x20000 << 8) | 154)
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#define SPI_MAX_CLK_FREQ_1KHZ ((0x8000 << 8) | 194)
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#ifdef __cplusplus
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}
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#endif
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#endif /* __SPI_INTEL_H__ */
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