2ad6e4e376
Clock Pulse Generator, Module Standby Software Reset, are registers presents in Renesas Gen3 SoC series. MSSR is used to supply clock to the different modules, shuch as timer, or UART, it's also possible to issue a reset the different module. CPG registers allow to get the rate or to set some divider like for the CAN clock. Signed-off-by: Julien Massot <julien.massot@iot.bzh>
22 lines
574 B
C
22 lines
574 B
C
/*
|
|
* Copyright (c) 2016 Open-RnD Sp. z o.o.
|
|
* Copyright (c) 2016 BayLibre, SAS
|
|
* Copyright (c) 2017 Linaro Limited.
|
|
* Copyright (c) 2017 RnDity Sp. z o.o.
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_RCAR_CLOCK_CONTROL_H_
|
|
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_RCAR_CLOCK_CONTROL_H_
|
|
|
|
#include <drivers/clock_control.h>
|
|
#include <dt-bindings/clock/renesas_rcar_cpg.h>
|
|
|
|
struct rcar_cpg_clk {
|
|
uint32_t domain;
|
|
uint32_t module;
|
|
uint32_t rate;
|
|
};
|
|
|
|
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_RCAR_CLOCK_CONTROL_H_ */
|