542a7fa25d
The IRQ handler has had a major changes to manage syscall, reschedule and interrupt from user thread and stack guard. Add userspace support: - Use a global variable to know if the current execution is user or machine. The location of this variable is read only for all user thread and read/write for kernel thread. - Memory shared is supported. - Use dynamic allocation to optimize PMP slot usage. If the area size is a power of 2, only one PMP slot is used, else 2 are used. Add stack guard support: - Use MPRV bit to force PMP rules to machine mode execution. - IRQ stack have a locked stack guard to avoid re-write PMP configuration registers for each interruption and then win some cycle. - The IRQ stack is used as "temporary" stack at the beginning of IRQ handler to save current ESF. That avoid to trigger write fault on thread stack during store ESF which that call IRQ handler to infinity. - A stack guard is also setup for privileged stack of a user thread. Thread: - A PMP setup is specific to each thread. PMP setup are saved in each thread structure to improve reschedule performance. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Reviewed-by: Nicolas Royer <nroyer@baylibre.com>
165 lines
4.1 KiB
C
165 lines
4.1 KiB
C
/*
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* Copyright (c) 2020 BayLibre, SAS
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief RISCV specific syscall header
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*
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* This header contains the RISCV specific syscall interface. It is
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* included by the syscall interface architecture-abstraction header
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* (include/arch/syscall.h)
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_RISCV_SYSCALL_H_
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#define ZEPHYR_INCLUDE_ARCH_RISCV_SYSCALL_H_
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#define _SVC_CALL_CONTEXT_SWITCH 0
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#define _SVC_CALL_IRQ_OFFLOAD 1
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#define _SVC_CALL_RUNTIME_EXCEPT 2
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#define _SVC_CALL_SYSTEM_CALL 3
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#define FORCE_SYSCALL_ID -1
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#ifdef CONFIG_USERSPACE
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#ifndef _ASMLANGUAGE
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#include <zephyr/types.h>
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Syscall invocation macros. riscv-specific machine constraints used to ensure
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* args land in the proper registers.
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*/
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static inline uintptr_t arch_syscall_invoke6(uintptr_t arg1, uintptr_t arg2,
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uintptr_t arg3, uintptr_t arg4,
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uintptr_t arg5, uintptr_t arg6,
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uintptr_t call_id)
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{
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register uint32_t a0 __asm__ ("a0") = arg1;
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register uint32_t a1 __asm__ ("a1") = arg2;
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register uint32_t a2 __asm__ ("a2") = arg3;
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register uint32_t a3 __asm__ ("a3") = arg4;
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register uint32_t a4 __asm__ ("a4") = arg5;
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register uint32_t a5 __asm__ ("a5") = arg6;
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register uint32_t a7 __asm__ ("a7") = call_id;
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__asm__ volatile ("ecall"
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: "+r" (a0)
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: "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5),
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"r" (a7)
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: "memory");
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return a0;
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}
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static inline uintptr_t arch_syscall_invoke5(uintptr_t arg1, uintptr_t arg2,
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uintptr_t arg3, uintptr_t arg4,
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uintptr_t arg5,
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uintptr_t call_id)
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{
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register uint32_t a0 __asm__ ("a0") = arg1;
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register uint32_t a1 __asm__ ("a1") = arg2;
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register uint32_t a2 __asm__ ("a2") = arg3;
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register uint32_t a3 __asm__ ("a3") = arg4;
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register uint32_t a4 __asm__ ("a4") = arg5;
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register uint32_t a7 __asm__ ("a7") = call_id;
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__asm__ volatile ("ecall"
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: "+r" (a0)
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: "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a7)
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: "memory");
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return a0;
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}
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static inline uintptr_t arch_syscall_invoke4(uintptr_t arg1, uintptr_t arg2,
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uintptr_t arg3, uintptr_t arg4,
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uintptr_t call_id)
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{
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register uint32_t a0 __asm__ ("a0") = arg1;
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register uint32_t a1 __asm__ ("a1") = arg2;
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register uint32_t a2 __asm__ ("a2") = arg3;
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register uint32_t a3 __asm__ ("a3") = arg4;
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register uint32_t a7 __asm__ ("a7") = call_id;
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__asm__ volatile ("ecall"
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: "+r" (a0)
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: "r" (a1), "r" (a2), "r" (a3), "r" (a7)
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: "memory");
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return a0;
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}
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static inline uintptr_t arch_syscall_invoke3(uintptr_t arg1, uintptr_t arg2,
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uintptr_t arg3,
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uintptr_t call_id)
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{
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register uint32_t a0 __asm__ ("a0") = arg1;
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register uint32_t a1 __asm__ ("a1") = arg2;
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register uint32_t a2 __asm__ ("a2") = arg3;
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register uint32_t a7 __asm__ ("a7") = call_id;
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__asm__ volatile ("ecall"
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: "+r" (a0)
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: "r" (a1), "r" (a2), "r" (a7)
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: "memory");
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return a0;
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}
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static inline uintptr_t arch_syscall_invoke2(uintptr_t arg1, uintptr_t arg2,
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uintptr_t call_id)
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{
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register uint32_t a0 __asm__ ("a0") = arg1;
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register uint32_t a1 __asm__ ("a1") = arg2;
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register uint32_t a7 __asm__ ("a7") = call_id;
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__asm__ volatile ("ecall"
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: "+r" (a0)
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: "r" (a1), "r" (a7)
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: "memory");
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return a0;
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}
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static inline uintptr_t arch_syscall_invoke1(uintptr_t arg1, uintptr_t call_id)
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{
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register uint32_t a0 __asm__ ("a0") = arg1;
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register uint32_t a7 __asm__ ("a7") = call_id;
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__asm__ volatile ("ecall"
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: "+r" (a0)
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: "r" (a7)
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: "memory");
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return a0;
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}
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static inline uintptr_t arch_syscall_invoke0(uintptr_t call_id)
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{
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register uint32_t a0 __asm__ ("a0");
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register uint32_t a7 __asm__ ("a7") = call_id;
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__asm__ volatile ("ecall"
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: "+r" (a0)
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: "r" (a7)
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: "memory");
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return a0;
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}
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static inline bool arch_is_user_context(void)
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{
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/* Defined in arch/riscv/core/thread.c */
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extern ulong_t is_user_mode;
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return is_user_mode;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ASMLANGUAGE */
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#endif /* CONFIG_USERSPACE */
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#endif /* ZEPHYR_INCLUDE_ARCH_RISCV_SYSCALL_H_ */
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