dca54e69f2
Add sifive-e24 cpu binding. This introduce riscv,cpu binding to be used as riscv cpu base and riscv,sifive, which define specific properties for this vendor. Both are necessary to create the e24 core. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com> |
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| .. | ||
| openisa,rv32m1-pcc.yaml | ||
| riscv,cpus.yaml | ||
| riscv,sifive-e24.yaml | ||
| riscv,sifive.yaml | ||