Naga Sureshkumar Relli c5818d4b3f dts: riscv: introduce Polarfire SOC SPI interface ... Add support for the Microchip Polarfire SOC SPI interface. Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>		2024-01-31 06:36:21 -05:00
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andes	dts/riscv/andes: add andestech,andescore-v5 compatible string	2024-01-31 10:41:49 +01:00
efinix	dts/riscv/efinix: add the efinix,vexriscv-sapphire compatible string	2024-01-31 10:41:49 +01:00
espressif/esp32c3	dts/riscv: add riscv compatible string where it's missing	2024-01-31 10:41:49 +01:00
gd	dts/riscv: add riscv compatible string where it's missing	2024-01-31 10:41:49 +01:00
ite	dts/riscv: add riscv compatible string where it's missing	2024-01-31 10:41:49 +01:00
lowrisc	dts/riscv/lowrisc: add lowrisc,ibex compatible string	2024-01-31 10:41:49 +01:00
microchip	dts: riscv: introduce Polarfire SOC SPI interface	2024-01-31 06:36:21 -05:00
niosv	dts/riscv: add riscv compatible string where it's missing	2024-01-31 10:41:49 +01:00
openisa	dts/riscv/openisa: add compatible strings for the RI5CY cores	2024-01-31 10:41:49 +01:00
sifive	dts/riscv: add riscv compatible string where it's missing	2024-01-31 10:41:49 +01:00
starfive	dts/riscv: remove the timebase-frequency property	2024-01-31 10:41:49 +01:00
telink	drivers: intc: plic: define all registers' offset in the driver	2023-10-04 09:06:28 -04:00
neorv32.dtsi	dts/riscv: add riscv compatible string where it's missing	2024-01-31 10:41:49 +01:00
renode_riscv32_virt.dtsi	dts: riscv: add a SoC dtsi for Renode RISC-V Virt SoC	2024-01-08 12:35:10 +01:00
riscv32-litex-vexriscv.dtsi	dts/riscv/litex: add litex,vexriscv-standard compatible string	2024-01-31 10:41:49 +01:00
virt.dtsi	dts/riscv: remove the timebase-frequency property	2024-01-31 10:41:49 +01:00