zephyr/tests/drivers/clock_control
Erwan Gouriou 888607d550 tests: clock_control: stm32h7: pll2: Fix test configuration
In test spi1_pll2p_1, pll2 should be enabled instead of pll3.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-04 16:51:57 +01:00
..
adsp_clock tests/samples: use integration_plaforms in more tests/samples 2022-11-29 16:03:23 +01:00
clock_control_api tests/samples: use integration_plaforms in more tests/samples 2022-11-29 16:03:23 +01:00
nrf_clock_calibration tests/samples: use integration_plaforms in more tests/samples 2022-11-29 16:03:23 +01:00
nrf_lf_clock_start tests/samples: use integration_plaforms in more tests/samples 2022-11-29 16:03:23 +01:00
nrf_onoff_and_bt tests/samples: use integration_plaforms in more tests/samples 2022-11-29 16:03:23 +01:00
onoff tests/samples: use integration_plaforms in more tests/samples 2022-11-29 16:03:23 +01:00
stm32_clock_configuration tests: clock_control: stm32h7: pll2: Fix test configuration 2023-01-04 16:51:57 +01:00