zephyr/dts
Carlo Caione e4a125b6a4 dt: Make zephyr,memory-attr a capabilities bitmask
This is the final step in making the `zephyr,memory-attr` property
actually useful.

The problem with the current implementation is that `zephyr,memory-attr`
is an enum type, this is making very difficult to use that to actually
describe the memory capabilities. The solution proposed in this PR is to
use the `zephyr,memory-attr` property as an OR-ed bitmask of memory
attributes.

With the change proposed in this PR it is possible in the DeviceTree to
mark the memory regions with a bitmask of attributes by using the
`zephyr,memory-attr` property. This property and the related memory
region can then be retrieved at run-time by leveraging a provided helper
library or the usual DT helpers.

The set of general attributes that can be specified in the property are
defined and explained in
`include/zephyr/dt-bindings/memory-attr/memory-attr.h` (the list can be
extended when needed).

For example, to mark a memory region in the DeviceTree as volatile,
non-cacheable, out-of-order:

   mem: memory@10000000 {
       compatible = "mmio-sram";
       reg = <0x10000000 0x1000>;
       zephyr,memory-attr = <( DT_MEM_VOLATILE |
			       DT_MEM_NON_CACHEABLE |
			       DT_MEM_OOO )>;
   };

The `zephyr,memory-attr` property can also be used to set
architecture-specific custom attributes that can be interpreted at run
time. This is leveraged, among other things, to create MPU regions out
of DeviceTree defined memory regions on ARM, for example:

   mem: memory@10000000 {
       compatible = "mmio-sram";
       reg = <0x10000000 0x1000>;
       zephyr,memory-region = "NOCACHE_REGION";
       zephyr,memory-attr = <( DT_ARM_MPU(ATTR_MPU_RAM_NOCACHE) )>;
   };

See `include/zephyr/dt-bindings/memory-attr/memory-attr-mpu.h` to see
how an architecture can define its own special memory attributes (in
this case ARM MPU).

The property can also be used to set custom software-specific
attributes. For example we can think of marking a memory region as
available to be used for memory allocation (not yet implemented):

   mem: memory@10000000 {
       compatible = "mmio-sram";
       reg = <0x10000000 0x1000>;
       zephyr,memory-attr = <( DT_MEM_NON_CACHEABLE |
			       DT_MEM_SW_ALLOCATABLE )>;
   };

Or maybe we can leverage the property to specify some alignment
requirements for the region:

   mem: memory@10000000 {
       compatible = "mmio-sram";
       reg = <0x10000000 0x1000>;
       zephyr,memory-attr = <( DT_MEM_CACHEABLE |
			       DT_MEM_SW_ALIGN(32) )>;
   };

The conventional and recommended way to deal and manage with memory
regions marked with attributes is by using the provided `mem-attr`
helper library by enabling `CONFIG_MEM_ATTR` (or by using the usual DT
helpers).

When this option is enabled the list of memory regions and their
attributes are compiled in a user-accessible array and a set of
functions is made available that can be used to query, probe and act on
regions and attributes, see `include/zephyr/mem_mgmt/mem_attr.h`

Note that the `zephyr,memory-attr` property is only a descriptive
property of the capabilities of the associated memory  region, but it
does not result in any actual setting for the memory to be set. The
user, code or subsystem willing to use this information to do some work
(for example creating an MPU region out of the property) must use either
the provided `mem-attr` library or the usual DeviceTree helpers to
perform the required work / setting.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-09-15 12:46:54 +02:00
..
arc/synopsys drivers: pinctrl: add pinctrl driver for ARC emsdp 2023-05-29 09:21:07 -04:00
arm dt: Make zephyr,memory-attr a capabilities bitmask 2023-09-15 12:46:54 +02:00
arm64 dts: arm64: intel: Add support for sip_svc for agilex5 2023-09-15 09:26:49 +02:00
bindings dt: Make zephyr,memory-attr a capabilities bitmask 2023-09-15 12:46:54 +02:00
common dts/arm: stm32: Add clocks nodes on stm32wb,l4 and stm32f4 series 2021-04-27 11:53:37 +02:00
nios2/intel dts: nios2: intel: nios2-qemu: add jtag interrupt 2023-01-27 14:24:43 -05:00
posix dts: posix: Add DTS support for POSIX architecture 2019-05-28 21:14:19 -04:00
riscv dts/riscv: add missing riscv,isa fields and modify existing ones 2023-09-14 14:34:34 +02:00
sparc/gaisler dts/sparc/gaisler: add SoC and board compatible strings 2023-05-02 10:53:27 +02:00
x86/intel drivers: gpio: Add Intel SEDI gpio driver 2023-09-12 10:56:08 +02:00
xtensa xtensa: dc233c: enlarge ROM space 2023-09-14 17:07:21 -04:00
binding-template.yaml doc: devicetree: overhaul bindings guide 2021-04-22 15:32:10 +02:00
Kconfig dts: Include Kconfig.dts as optional source 2022-08-15 11:10:51 -07:00