zephyr/include/arch/arc
Evgeniy Paltsev a7d07cb62c ARC: forbid FIRQ or multiple register banks w/ 1 IRQ priority level
Don't allow to enable multiple register banks / fast
interrupts if we have only one interrupt priority level.

NOTE: we duplicate some checks by adding dependencies to ARC
Kconfig and adding build-time checks in C code. We do it
intentionally as for some reason we can violate dependencies
in architecture-level Kconfig by adding incorrect default in
SoC-level Kconfig. Such violation happens without any
warnings / errors from the Kconfig.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-10-13 20:41:29 -04:00
..
asm-compat ARC: add asm-compat macro for MWDT toolchain 2021-05-07 14:55:49 -05:00
v2 linker: __data_region_start equal to __data_start 2021-09-24 15:13:13 -04:00
arc_addr_types.h ARC: MWDT: workaround paddr_t defined in both Zephyr and toolchain 2021-08-13 13:43:19 -05:00
arch_inlines.h ARC: reuse headers for both ARCv3 and ARCv3 if possible 2021-05-07 14:55:49 -05:00
arch.h ARC: forbid FIRQ or multiple register banks w/ 1 IRQ priority level 2021-10-13 20:41:29 -04:00
sys-io-common.h ARC: split sys-io for common and ARCv2-only parts 2021-05-07 14:55:49 -05:00
syscall.h ARC: Kconfig: rename CPU_ARCV2 option to ISA_ARCV2 2021-03-25 07:23:02 -04:00
thread.h ARC: make variables with regs and addresses bit agnostic 2021-05-07 14:55:49 -05:00
tool-compat.h ARC: handle the difference of assembly macro definition 2020-09-05 10:22:56 -05:00