Andy Ross 5b85d6da6a arch/x86_64: Poison instruction pointer of running threads ... There was a bug where double-dispatch of a single thread on multiple SMP CPUs was possible. This can be mind-bending to diagnose, so when CONFIG_ASSERT is enabled add an extra instruction to __resume (the shared code path for both interupt return and context switch) that poisons the shared RIP of the now-running thread with a recognizable invalid value. Now attempts to run the thread again will crash instantly with a discoverable cookie in their instruction pointer, and this will remain true until it gets a new RIP at the next interrupt or switch. This is under CONFIG_ASSERT because it meets the same design goals of "a cheap test for impossible situations", not because it's part of the assertion framework. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>		2020-02-03 09:31:56 -05:00
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arc	extensions.cmake: Replace TEXT_START with ROM_START	2020-01-23 03:22:59 -08:00
arm	arch: arm64: Enable shared IRQ line for UART	2020-02-01 08:08:43 -05:00
common	tests: benchmarks: Add ARM64 case	2020-02-01 08:08:43 -05:00
nios2	global: Remove leading/trailing blank lines in files	2019-12-11 19:17:27 +01:00
posix	POSIX arch: Fix C++ main() linkage issue	2019-12-18 21:53:47 +01:00
riscv	riscv: use standard MSTATUS	2020-01-06 13:27:45 -05:00
x86	arch/x86_64: Poison instruction pointer of running threads	2020-02-03 09:31:56 -05:00
xtensa	xtensa: fix atomic_cas reporting value swapped even when not	2020-01-08 19:57:05 -05:00
CMakeLists.txt	arch: Simplify private header include path configuration.	2019-11-06 16:07:32 -08:00
Kconfig	base: add error checking macros	2020-01-20 17:19:54 -05:00