Ruibin Chang 0c3bb75a05 ITE soc/riscv/riscv-ite/common/chipregs: add registers and IRQ num ... Add registers and IRQ number for PD control. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>		2021-06-17 12:42:19 +02:00
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arm-gic.h
intel-ioapic.h
ite-intc.h	ITE soc/riscv/riscv-ite/common/chipregs: add registers and IRQ num	2021-06-17 12:42:19 +02:00
openisa-intmux.h