The Armv8R aarch64 is compiled with armv8.4-a, so the atomic_cas is
implemented by casal instruction, which needs FVP booting with
'-C bp.dram.enable_atomic_ops=1'
However, the FVP >= 11.17 has changed its parameters
'-C bp.dram.enable_atomic_ops' to '-C bp.s_dram.enable_atomic_ops' and
'-C bp.sram.enable_atomic_ops' to '-C bp.s_sram.enable_atomic_ops',
which is very annoying.
To fix this issue, disable LSE feature of GCC with 'armv8.4-a+nolse'.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
a072a801e7