Update intc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol to expose the driver and enable it by default based on devicetree. We remove 'depend on' Kconfig for symbols that would be implied by the devicetree node existing. Signed-off-by: Kumar Gala <galak@kernel.org>
45 lines
1.2 KiB
Plaintext
45 lines
1.2 KiB
Plaintext
# Copyright (c) 2019 Intel Corporation
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
config DW_ICTL_ACE_V1X
|
|
bool "Designware Interrupt Controller for ACE V1X"
|
|
default y
|
|
depends on DT_HAS_INTEL_ACE_INTC_ENABLED
|
|
depends on MULTI_LEVEL_INTERRUPTS
|
|
help
|
|
Designware Interrupt Controller used by ACE V1X.
|
|
|
|
menuconfig DW_ICTL
|
|
bool "Designware Interrupt Controller"
|
|
default y
|
|
depends on DT_HAS_SNPS_DESIGNWARE_INTC_ENABLED
|
|
depends on MULTI_LEVEL_INTERRUPTS
|
|
help
|
|
Designware Interrupt Controller can be used as a 2nd level interrupt
|
|
controller which combines several sources of interrupt into one line
|
|
that is then routed to the 1st level interrupt controller.
|
|
|
|
|
|
if DW_ICTL
|
|
|
|
config DW_ICTL_NAME
|
|
string "Name for Designware Interrupt Controller"
|
|
default "DW_ICTL"
|
|
help
|
|
Give a name for the instance of Designware Interrupt Controller
|
|
|
|
config DW_ISR_TBL_OFFSET
|
|
int "Offset in the SW ISR Table"
|
|
default 0
|
|
help
|
|
This indicates the offset in the SW_ISR_TABLE beginning from where
|
|
the ISRs for Designware Interrupt Controller are assigned.
|
|
|
|
config DW_ICTL_INIT_PRIORITY
|
|
int "Init priority for DW interrupt controller"
|
|
default 48
|
|
help
|
|
DesignWare Interrupt Controller initialization priority.
|
|
|
|
endif # DW_ICTL
|