da3d0b3492
The lpc and mcux drivers' DRV_COMPAT is updated for the new bindings introduced in the previous commit. The drivers' Kconfig files also reflect this change (DT_HAS_ENABLED_NXP_...). The SoC device trees are updated with the new bindings Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
16 lines
524 B
Plaintext
16 lines
524 B
Plaintext
# Copyright (c) 2020 NXP
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# SPDX-License-Identifier: Apache-2.0
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config SOC_FLASH_LPC
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bool "LPC flash shim driver"
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default y
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depends on DT_HAS_NXP_IAP_FMC11_ENABLED
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select FLASH_HAS_PAGE_LAYOUT
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select FLASH_HAS_DRIVER_ENABLED
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help
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Enables the LPC IAP flash shim driver.
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WARNING: This driver will disable the system interrupts for
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the duration of the flash erase/write operations. This will
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have an impact on the overall system performance - whether
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this is acceptable or not will depend on the use case.
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