The gen_isr_table test now tries to install two dynamic IRQ handlers. RISCV32 has a workaround due to limited number of SW triggerable interrupts that can be configured. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com> |
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| .. | ||
| src | ||
| CMakeLists.txt | ||
| prj.conf | ||
| testcase.yaml | ||