6fdc56d286
Make boolean expressions use boolean types. MISRA-C rule 14.4 Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
66 lines
1.7 KiB
C
66 lines
1.7 KiB
C
/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief ARCv2 public error handling
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*
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* ARC-specific kernel error handling interface. Included by arc/arch.h.
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_ERROR_H_
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#define ZEPHYR_INCLUDE_ARCH_ARC_V2_ERROR_H_
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#include <arch/arc/syscall.h>
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#include <arch/arc/v2/exc.h>
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef _ASMLANGUAGE
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#include <toolchain/gcc.h>
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extern void _NanoFatalErrorHandler(unsigned int, const NANO_ESF*);
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extern void _SysFatalErrorHandler(unsigned int cause, const NANO_ESF *esf);
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#endif
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#define _NANO_ERR_HW_EXCEPTION (0) /* MPU/Bus/Usage fault */
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#define _NANO_ERR_STACK_CHK_FAIL (2) /* Stack corruption detected */
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#define _NANO_ERR_ALLOCATION_FAIL (3) /* Kernel Allocation Failure */
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#define _NANO_ERR_KERNEL_OOPS (4) /* Kernel oops (fatal to thread) */
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#define _NANO_ERR_KERNEL_PANIC (5) /* Kernel panic (fatal to system) */
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/*
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* the exception caused by kernel will be handled in interrupt context
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* when the processor is already in interrupt context, no need to raise
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* a new exception; when the processor is in thread context, the exception
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* will be raised
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*/
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#define _ARCH_EXCEPT(reason_p) do { \
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if (_arc_v2_irq_unit_is_in_isr()) { \
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printk("@ %s:%d:\n", __FILE__, __LINE__); \
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_NanoFatalErrorHandler(reason_p, 0); \
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} else {\
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__asm__ volatile ( \
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"mov r0, %[reason]\n\t" \
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"trap_s %[id]\n\t" \
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: \
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: [reason] "i" (reason_p), \
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[id] "i" (_TRAP_S_CALL_RUNTIME_EXCEPT) \
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: "memory"); \
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CODE_UNREACHABLE; \
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} \
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} while (false)
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_INCLUDE_ARCH_ARC_V2_ERROR_H_ */
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