20202902f2
These changes were obtained by running a script created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:
1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
#define X Y)
3. Check if that name is also the name of a Kconfig option
3.a If it is, then do nothing
3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
(.c, .h, .ld)
Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.
Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
144 lines
3.5 KiB
C
144 lines
3.5 KiB
C
/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* This implementation supports only the regular irqs
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* No support for priority filtering
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* No support for vectored interrupts
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* Firqs are also not supported
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* This implementation works only when sw_isr_table is enabled in zephyr
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*/
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#include <device.h>
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#include <irq_nextlevel.h>
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#include "dw_ictl.h"
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#include <soc.h>
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static ALWAYS_INLINE void dw_ictl_dispatch_child_isrs(u32_t intr_status,
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u32_t isr_base_offset)
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{
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u32_t intr_bitpos, intr_offset;
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/* Dispatch lower level ISRs depending upon the bit set */
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while (intr_status) {
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intr_bitpos = find_lsb_set(intr_status) - 1;
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intr_status &= ~(1 << intr_bitpos);
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intr_offset = isr_base_offset + intr_bitpos;
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_sw_isr_table[intr_offset].isr(
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_sw_isr_table[intr_offset].arg);
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}
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}
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static int dw_ictl_initialize(struct device *port)
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{
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struct dw_ictl_runtime *dw = port->driver_data;
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volatile struct dw_ictl_registers * const regs =
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(struct dw_ictl_registers *)dw->base_addr;
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/* disable all interrupts */
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regs->irq_inten_l = 0;
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regs->irq_inten_h = 0;
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return 0;
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}
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static void dw_ictl_isr(void *arg)
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{
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struct device *port = (struct device *)arg;
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struct dw_ictl_runtime * const dw = port->driver_data;
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const struct dw_ictl_config *config = port->config->config_info;
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volatile struct dw_ictl_registers * const regs =
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(struct dw_ictl_registers *)dw->base_addr;
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dw_ictl_dispatch_child_isrs(regs->irq_maskstatus_l,
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config->isr_table_offset);
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if (config->numirqs > 32) {
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dw_ictl_dispatch_child_isrs(regs->irq_maskstatus_h,
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config->isr_table_offset + 32);
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}
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}
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static inline void dw_ictl_intr_enable(struct device *dev, unsigned int irq)
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{
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struct dw_ictl_runtime *context = dev->driver_data;
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volatile struct dw_ictl_registers * const regs =
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(struct dw_ictl_registers *)context->base_addr;
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if (irq < 32) {
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regs->irq_inten_l |= (1 << irq);
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} else {
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regs->irq_inten_h |= (1 << (irq - 32));
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}
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}
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static inline void dw_ictl_intr_disable(struct device *dev, unsigned int irq)
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{
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struct dw_ictl_runtime *context = dev->driver_data;
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volatile struct dw_ictl_registers * const regs =
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(struct dw_ictl_registers *)context->base_addr;
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if (irq < 32) {
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regs->irq_inten_l &= ~(1 << irq);
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} else {
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regs->irq_inten_h &= ~(1 << (irq - 32));
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}
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}
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static inline unsigned int dw_ictl_intr_get_state(struct device *dev)
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{
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struct dw_ictl_runtime *context = dev->driver_data;
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const struct dw_ictl_config *config = dev->config->config_info;
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volatile struct dw_ictl_registers * const regs =
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(struct dw_ictl_registers *)context->base_addr;
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if (regs->irq_inten_l) {
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return 1;
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}
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if (config->numirqs > 32) {
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if (regs->irq_inten_h) {
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return 1;
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}
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}
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return 0;
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}
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static void dw_ictl_config_irq(struct device *port);
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static const struct dw_ictl_config dw_config = {
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.irq_num = DT_DW_ICTL_IRQ,
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.numirqs = DW_ICTL_NUM_IRQS,
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.isr_table_offset = CONFIG_DW_ISR_TBL_OFFSET,
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.config_func = dw_ictl_config_irq,
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};
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static struct dw_ictl_runtime dw_runtime = {
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.base_addr = DT_DW_ICTL_BASE_ADDR,
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};
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static const struct irq_next_level_api dw_ictl_apis = {
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.intr_enable = dw_ictl_intr_enable,
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.intr_disable = dw_ictl_intr_disable,
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.intr_get_state = dw_ictl_intr_get_state,
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};
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DEVICE_AND_API_INIT(dw_ictl, CONFIG_DW_ICTL_NAME, dw_ictl_initialize,
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&dw_runtime, &dw_config,
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POST_KERNEL, CONFIG_DW_ICTL_INIT_PRIORITY, &dw_ictl_apis);
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static void dw_ictl_config_irq(struct device *port)
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{
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IRQ_CONNECT(DT_DW_ICTL_IRQ, DT_DW_ICTL_IRQ_PRI, dw_ictl_isr,
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DEVICE_GET(dw_ictl), DT_DW_ICTL_IRQ_FLAGS);
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}
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