Andrew Boie eeacd2061d mvic: default to IRQ 10 instead of 0 for timer ... This is a better choice of default; on Mint Valley using IRQ 0 for the timer collides with the DMA Error IRQ line. Issue: ZEP-849 Change-Id: I14cb60fbe548488198813b2351e0ed1f07c2d07d Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>		2016-09-12 17:53:21 +00:00
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arcv2_irq_unit.c	int: Set default ARC interrupts to lowest priority to start	2016-06-09 00:34:03 +00:00
exti_stm32.c	stm32: rename SOC_STM32F1X -> SOC_SERIES_STM32F1X	2016-04-18 21:24:58 +00:00
exti_stm32.h	interupt_controller/stm32_exti: driver for STM32 EXTI controller	2016-03-18 20:53:06 +00:00
i8259.c	init: use SYS_INIT() where it makes sense	2016-02-05 20:25:25 -05:00
ioapic_intr.c	pm/ioapic: Add suspend/resume support for IOAPIC	2016-05-24 00:31:38 +00:00
ioapic_priv.h	quark_se: apic: work around EOI forwarding issue	2016-02-05 20:25:05 -05:00
Kconfig	mvic: default to IRQ 10 instead of 0 for timer	2016-09-12 17:53:21 +00:00
Kconfig.stm32	stm32: rename CONFIG_SOC_STM32 -> CONFIG_SOC_FAMILY_STM32	2016-04-18 21:24:58 +00:00
loapic_intr.c	interrupt_controller: allow for indeterminate faulting vectors	2016-09-08 12:47:14 -07:00
loapic_spurious.S	loapic: handle spurious interrupts	2016-02-05 20:25:04 -05:00
Makefile	x86: declare internal API for interrupt controllers	2016-09-06 18:35:47 +00:00
mvic.c	interrupt_controller: allow for indeterminate faulting vectors	2016-09-08 12:47:14 -07:00
system_apic.c	x86: declare internal API for interrupt controllers	2016-09-06 18:35:47 +00:00