zephyr/soc
Tim Lin fa751b8472 ITE: soc: chip_chipregs: Add SPISC register structure
Use spisc_it8xxx2_regs instead of IT83XX_SPI_*** registers declaration
to fix in cros_shi_it8xxx2.c

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-11-09 10:44:29 +01:00
..
arc smp: Kconfig: Move to using MP_MAX_NUM_CPUS 2022-10-20 22:04:10 +09:00
arm soc: arm: st_stm32: stm32f0: Add support for stm32f030x6 2022-11-09 10:43:41 +01:00
arm64 boards: fvp_baser_aemv8r: remove SOC_FVP_AEMV8R_EL2_INIT code 2022-10-12 18:46:49 +09:00
mips asm: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
nios2 linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
posix cmake: Update CONFIG_ASAN support 2022-08-19 08:30:01 +02:00
riscv ITE: soc: chip_chipregs: Add SPISC register structure 2022-11-09 10:44:29 +01:00
sparc linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
x86 soc: raptor_lake: Cleanup CMakeLists 2022-10-25 09:50:15 -05:00
xtensa soc: intel_adsp/ace: wait for lpsram power up 2022-11-08 10:48:30 +01:00
Kconfig soc: Add ability for SOC to specify runtime CPU detection 2022-11-03 16:43:53 -04:00