Flavio Ceolin 6069f946be soc: intel_adsp: Avoid duplicate header ... adsp_memory.h is pretty much the same for all ace platforms. Generalize it getting register address from devicetree and and move it to a common place. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>		2024-06-07 09:52:42 +02:00
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intel_adsp_ace15_mtpm.dtsi	soc: intel_adsp: Avoid duplicate header	2024-06-07 09:52:42 +02:00
intel_adsp_ace20_lnl.dtsi	soc: intel_adsp: Avoid duplicate header	2024-06-07 09:52:42 +02:00
intel_adsp_ace30_ptl.dtsi	soc: intel_adsp: Avoid duplicate header	2024-06-07 09:52:42 +02:00
intel_adsp_cavs15.dtsi	ace: cavs: dts: Add d-cache and i-cache line size	2022-11-23 15:39:05 -05:00
intel_adsp_cavs18.dtsi	soc/xtensa/intel_adsp: fix interrupts typo	2023-12-20 09:16:45 -05:00
intel_adsp_cavs20_jsl.dtsi	ace: cavs: dts: Add d-cache and i-cache line size	2022-11-23 15:39:05 -05:00
intel_adsp_cavs20.dtsi	ace: cavs: dts: Add d-cache and i-cache line size	2022-11-23 15:39:05 -05:00
intel_adsp_cavs25_tgph.dtsi	intel_adsp: adsp_memory: update cAVS 2.5 memory definitions	2024-05-01 10:31:52 +02:00
intel_adsp_cavs25.dtsi	intel_adsp: adsp_memory: update cAVS 2.5 memory definitions	2024-05-01 10:31:52 +02:00
intel_adsp_cavs.dtsi	dts: xtensa: intel: add HDA DMA interrupt defs for cAVS platforms	2023-08-31 09:59:10 -04:00