zephyr/arch
Mathieu Choplain cba9dceff4 Revert "arch: arm: cortex_m: Add API for scb save and restore"
This reverts commit a90a47b1c9.

This commit was written with CMSIS 5 in mind, where some Cortex-M cores
have "SHP" in the SCB_Type, and some have "SHPR". This is not correct as
Zephyr is *supposed* to be using CMSIS 6 for Cortex-M... but CI actually
picks up CMSIS 5 instead (it includes both with CMSIS 5 taking priority).

The end result is that Zephyr's CI builds this happily but it causes build
failures on downstream users (e.g., example-application).

Revert the commit now, as it is not used yet by anyone. The revised version
using only "SHPR" shall be reintroduced once the CI issue has been fixed.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-07-25 11:20:12 +01:00
..
arc kernel: Add arch_coprocessors_disable() 2025-07-20 12:25:17 -04:00
arm Revert "arch: arm: cortex_m: Add API for scb save and restore" 2025-07-25 11:20:12 +01:00
arm64 kernel: Add arch_coprocessors_disable() 2025-07-20 12:25:17 -04:00
common arch: arc: support CONFIG_ROM_START_OFFSET 2025-07-19 15:32:03 -04:00
mips kernel: Add arch_coprocessors_disable() 2025-07-20 12:25:17 -04:00
posix kernel: Add arch_coprocessors_disable() 2025-07-20 12:25:17 -04:00
riscv kernel: Add arch_coprocessors_disable() 2025-07-20 12:25:17 -04:00
rx kernel: Add arch_coprocessors_disable() 2025-07-20 12:25:17 -04:00
sparc kernel: Add arch_coprocessors_disable() 2025-07-20 12:25:17 -04:00
x86 kernel: Add arch_coprocessors_disable() 2025-07-20 12:25:17 -04:00
xtensa gdb: xtensa: fix sparse warnings 2025-07-21 13:03:30 -04:00
archs.yml scripts: hwm_v2: add full_name property for archs 2025-06-06 10:29:44 +02:00
CMakeLists.txt
Kconfig arch: xtensa: Refine HiFi sharing Kconfigs 2025-07-20 12:25:17 -04:00