76fc2f92df
Tickless test dependency on legacy API is resolved, Changing test directory from tests/legacy/kernel/test_tickless to tests/kernel/test_tickless/. Jira: ZEP-2008 Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com> Change-Id: I0b53ae6eff3a915d988d3234592eb5f8b425b371
310 lines
7.6 KiB
C
310 lines
7.6 KiB
C
/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file timestamp support for tickless idle testing
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*
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* Platform-specific timestamp support for the tickless idle test.
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*/
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#include <tc_util.h>
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#include <stddef.h>
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#include <misc/__assert.h>
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#if defined(CONFIG_SOC_TI_LM3S6965_QEMU)
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/*
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* @brief Use a General Purpose Timer in
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* 32-bit periodic timer mode (down-counter)
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* (RTC mode's resolution of 1 second is insufficient.)
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*/
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#define _TIMESTAMP_NUM 0 /* set to timer # for use by timestamp (0-3) */
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#define _CLKGATECTRL *((volatile uint32_t *)0x400FE104)
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#define _CLKGATECTRL_TIMESTAMP_EN (1 << (16 + _TIMESTAMP_NUM))
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#define _TIMESTAMP_BASE 0x40030000
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#define _TIMESTAMP_OFFSET (0x1000 * _TIMESTAMP_NUM)
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#define _TIMESTAMP_ADDR (_TIMESTAMP_BASE + _TIMESTAMP_OFFSET)
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#define _TIMESTAMP_CFG *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0))
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#define _TIMESTAMP_CTRL *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0xC))
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#define _TIMESTAMP_MODE *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x4))
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#define _TIMESTAMP_LOAD *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x28))
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#define _TIMESTAMP_IMASK *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x18))
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#define _TIMESTAMP_ISTATUS *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x1C))
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#define _TIMESTAMP_ICLEAR *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x24))
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#define _TIMESTAMP_VAL *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x48))
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/*
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* Set the rollover value such that it leaves the most significant bit of
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* the returned timestamp value unused. This allows room for extended values
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* when handling rollovers when converting to an up-counter value.
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*/
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#define _TIMESTAMP_MAX ((uint32_t)0x7FFFFFFF)
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#define _TIMESTAMP_EXT ((uint32_t)0x80000000)
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#define TICKS_TO_MS (MSEC_PER_SEC / CONFIG_SYS_CLOCK_TICKS_PER_SEC)
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/**
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*
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* @brief Timestamp initialization
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*
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* This routine initializes the timestamp timer.
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*
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* @return N/A
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*/
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void _TimestampOpen(void)
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{
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/* QEMU does not currently support the 32-bit timer modes of the GPTM */
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printk("WARNING! Timestamp is not supported for this target!\n");
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/* enable timer access */
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_CLKGATECTRL |= _CLKGATECTRL_TIMESTAMP_EN;
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/* minimum 3 clk delay is required before timer register access */
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k_sleep(3 * TICKS_TO_MS);
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_TIMESTAMP_CTRL = 0x0; /* disable/reset timer */
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_TIMESTAMP_CFG = 0x0; /* 32-bit timer */
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_TIMESTAMP_MODE = 0x2; /* periodic mode */
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_TIMESTAMP_LOAD = _TIMESTAMP_MAX; /* maximum interval to reduce rollovers */
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_TIMESTAMP_IMASK = 0x70F; /* mask all timer interrupts */
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_TIMESTAMP_ICLEAR = 0x70F; /* clear all interrupt status */
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_TIMESTAMP_CTRL = 0x1; /* enable timer */
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}
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/**
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*
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* @brief Timestamp timer read
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*
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* This routine returns the timestamp value.
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*
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* @return timestamp value
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*/
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uint32_t _TimestampRead(void)
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{
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static uint32_t lastTimerVal;
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static uint32_t cnt;
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uint32_t timerVal = _TIMESTAMP_VAL;
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/* handle rollover for every other read (end of sleep) */
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if ((cnt % 2) && (timerVal > lastTimerVal)) {
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lastTimerVal = timerVal;
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/* convert to extended up-counter value */
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timerVal = _TIMESTAMP_EXT + (_TIMESTAMP_MAX - timerVal);
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} else {
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lastTimerVal = timerVal;
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/* convert to up-counter value */
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timerVal = _TIMESTAMP_MAX - timerVal;
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}
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cnt++;
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return timerVal;
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}
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/**
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*
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* @brief Timestamp release
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*
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* This routine releases the timestamp timer.
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*
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* @return N/A
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*/
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void _TimestampClose(void)
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{
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/* disable/reset timer */
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_TIMESTAMP_CTRL = 0x0;
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_TIMESTAMP_CFG = 0x0;
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/* disable timer access */
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_CLKGATECTRL &= ~_CLKGATECTRL_TIMESTAMP_EN;
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}
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#elif defined(CONFIG_SOC_MK64F12)
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/* Freescale FRDM-K64F target - use RTC (prescale value) */
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#define _COUNTDOWN_TIMER false
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#define _CLKGATECTRL *((volatile uint32_t *)0x4004803C)
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#define _CLKGATECTRL_TIMESTAMP_EN (1 << 29)
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#define _SYSOPTCTRL2 *((volatile uint32_t *)0x40048004)
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#define _SYSOPTCTRL2_32KHZRTCCLK (1 << 4)
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#define _TIMESTAMP_ADDR (0x4003D000)
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#define _TIMESTAMP_ICLEAR *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x24))
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#define _TIMESTAMP_VAL *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0))
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#define _TIMESTAMP_PRESCALE *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x4))
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#define _TIMESTAMP_COMP *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0xC))
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#define _TIMESTAMP_CTRL *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x10))
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#define _TIMESTAMP_STATUS *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x14))
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#define _TIMESTAMP_LOCK *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x18))
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#define _TIMESTAMP_IMASK *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x1C))
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#define _TIMESTAMP_RACCESS *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x800))
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#define _TIMESTAMP_WACCESS *((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x804))
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/**
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*
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* @brief Timestamp initialization
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*
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* This routine initializes the timestamp timer.
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*
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* @return N/A
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*/
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void _TimestampOpen(void)
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{
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/* enable timer access */
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_CLKGATECTRL |= _CLKGATECTRL_TIMESTAMP_EN;
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/* set 32 KHz RTC clk */
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_SYSOPTCTRL2 |= _SYSOPTCTRL2_32KHZRTCCLK;
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_TIMESTAMP_STATUS = 0x0; /* disable counter */
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_TIMESTAMP_CTRL = 0x100; /* enable oscillator */
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_TIMESTAMP_LOCK = 0xFF; /* unlock registers */
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_TIMESTAMP_PRESCALE = 0x0; /* reset prescale value */
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_TIMESTAMP_COMP = 0x0; /* reset compensation values */
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_TIMESTAMP_RACCESS = 0xFF; /* allow register read access */
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_TIMESTAMP_WACCESS = 0xFF; /* allow register write access */
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_TIMESTAMP_IMASK = 0x0; /* mask all timer interrupts */
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/* minimum 0.3 sec delay required for oscillator stabilization */
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k_sleep(0.3 * MSEC_PER_SEC);
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_TIMESTAMP_VAL = 0x0; /* clear invalid time flag in status register */
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_TIMESTAMP_STATUS = 0x10; /* enable counter */
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}
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/**
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*
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* @brief Timestamp timer read
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*
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* This routine returns the timestamp value.
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*
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* @return timestamp value
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*/
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uint32_t _TimestampRead(void)
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{
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static uint32_t lastPrescale;
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static uint32_t cnt;
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uint32_t prescale1 = _TIMESTAMP_PRESCALE;
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uint32_t prescale2 = _TIMESTAMP_PRESCALE;
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/* ensure a valid reading */
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while (prescale1 != prescale2) {
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prescale1 = _TIMESTAMP_PRESCALE;
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prescale2 = _TIMESTAMP_PRESCALE;
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}
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/* handle prescale rollover @ 0x8000 for every other read (end of sleep) */
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if ((cnt % 2) && (prescale1 < lastPrescale)) {
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prescale1 += 0x8000;
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}
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lastPrescale = prescale2;
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cnt++;
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return prescale1;
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}
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/**
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*
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* @brief Timestamp release
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*
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* This routine releases the timestamp timer.
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*
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* @return N/A
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*/
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void _TimestampClose(void)
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{
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_TIMESTAMP_STATUS = 0x0; /* disable counter */
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_TIMESTAMP_CTRL = 0x0; /* disable oscillator */
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}
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#elif defined(CONFIG_SOC_ATMEL_SAM3)
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/* Atmel SAM3 family processor - use RTT (Real-time Timer) */
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#include <soc.h>
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#define _TIMESTAMP_ADDR (0x400E1A30)
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#define _TIMESTAMP_MODE (*((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x00)))
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#define _TIMESTAMP_VAL (*((volatile uint32_t *)(_TIMESTAMP_ADDR + 0x08)))
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/**
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*
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* @brief Timestamp initialization
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*
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* This routine initializes the timestamp timer.
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*
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* @return N/A
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*/
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void _TimestampOpen(void)
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{
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/* enable RTT clock from PMC */
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__PMC->pcer0 = (1 << PID_RTT);
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/* Reset RTT and set prescaler to 1 */
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_TIMESTAMP_MODE = (1 << 18) | (1 << 0);
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}
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/**
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*
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* @brief Timestamp timer read
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*
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* This routine returns the timestamp value.
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*
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* @return timestamp value
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*/
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uint32_t _TimestampRead(void)
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{
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static uint32_t last_val;
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uint32_t tmr_val = _TIMESTAMP_VAL;
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uint32_t ticks;
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/* handle rollover */
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if (tmr_val < last_val) {
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ticks = ((0xFFFFFFFF - last_val)) + 1 + tmr_val;
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} else {
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ticks = tmr_val - last_val;
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}
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last_val = tmr_val;
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return ticks;
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}
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/**
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*
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* @brief Timestamp release
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*
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* This routine releases the timestamp timer.
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*
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* @return N/A
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*/
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void _TimestampClose(void)
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{
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/* disable RTT clock from PMC */
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__PMC->pcdr0 = (1 << PID_RTT);
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}
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#else
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#error "Unknown platform"
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#endif /* CONFIG_SOC_xxx */
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