Andrew Boie 4455ee6d87 ARM: rebase available priority levels to 0 ... We have a new policy: users should not be able to configure an interrupt with "forbidden" priority levels, and any priority levels with special semantics will be activated by flags. Change-Id: I757c19cfedcb1d0938eaf4da348ddafb71b3e001 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>		2016-02-08 21:47:35 -05:00
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scripts	arm: add support for linking images entirely in SRAM	2016-02-05 20:25:24 -05:00
addr_types.h	arm: Add paddr_t/vaddr_t	2016-02-05 20:24:41 -05:00
asm_inline_gcc.h	c++: Add extern "C" { } block to header files	2016-02-05 20:25:22 -05:00
asm_inline.h	Change BSD-3 licenses to Apache 2	2016-02-05 20:24:29 -05:00
error.h	c++: Add extern "C" { } block to header files	2016-02-05 20:25:22 -05:00
exc.h	arm: add connecting exceptions at runtime	2016-02-05 20:25:24 -05:00
gdb_stub.h	c++: Add extern "C" { } block to header files	2016-02-05 20:25:22 -05:00
irq.h	ARM: rebase available priority levels to 0	2016-02-08 21:47:35 -05:00
memory_map-m3-m4.h	Fixed file description and applied doxygen style	2016-02-05 20:24:58 -05:00
memory_map.h	Fixed file description and applied doxygen style	2016-02-05 20:24:58 -05:00
misc.h	c++: Add extern "C" { } block to header files	2016-02-05 20:25:22 -05:00
nvic.h	arm/nvic: add _NUM_EXC symbol for number of exceptions	2016-02-05 20:25:24 -05:00
scb.h	arm: rework _ScbSystemReset() into sys_arch_reboot()	2016-02-05 20:25:24 -05:00
scs.h	c++: Add extern "C" { } block to header files	2016-02-05 20:25:22 -05:00