zephyr/drivers/interrupt_controller/Kconfig
Andriy Gelman 727e589448 drivers: interrupt_controller: Add XMC4XXX ERU driver
In Infineon XMC4XXX SoCs, gpio interrupts are triggered via an
Event Request Unit (ERU) module. A subset of the gpios are
connected to the ERU. The ERU monitors edge triggers and creates
a SR.

This driver configures the ERU for a target port/pin combination
for rising/falling edge events. Note that the ERU module does
not generate SR based on the gpio level. Internally the ERU
tracks the *status* of an event. The status is set on a positive
edge and unset on a negative edge (or vice-versa depending on
the configuration). The value of the status is used to implement
a level triggered interrupt; The ISR checks the status flag and
calls the callback function if the status is set.

The ERU configurations for supported port/pin combinations are
stored in a devicetree file dts/arm/infineon/xmc4xxx_x_x-intc.dtsi.
The configurations are stored in the opaque array
uint16 port_line_mapping[].

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-12-12 10:51:29 +01:00

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# interrupt controller configuration options
# Copyright (c) 2015 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
menu "Interrupt Controllers"
config ARCV2_INTERRUPT_UNIT
bool "ARCv2 Interrupt Unit"
default y
depends on ARC
help
The ARCv2 interrupt unit has 16 allocated exceptions associated with
vectors 0 to 15 and 240 interrupts associated with vectors 16 to 255.
The interrupt unit is optional in the ARCv2-based processors. When
building a processor, you can configure the processor to include an
interrupt unit. The ARCv2 interrupt unit is highly programmable.
config SWERV_PIC
bool "SweRV EH1 Programmable Interrupt Controller (PIC)"
default y
depends on DT_HAS_SWERV_PIC_ENABLED
help
Programmable Interrupt Controller for the SweRV EH1 RISC-V CPU.
config VEXRISCV_LITEX_IRQ
bool "VexRiscv LiteX Interrupt controller"
default y
depends on DT_HAS_VEXRISCV_INTC0_ENABLED
help
IRQ implementation for LiteX VexRiscv
config LEON_IRQMP
bool "GRLIB IRQMP interrupt controller"
default y
depends on DT_HAS_GAISLER_IRQMP_ENABLED
help
GRLIB IRQMP and IRQAMP
config INTC_INIT_PRIORITY
int "Interrupt controller init priority"
default KERNEL_INIT_PRIORITY_DEFAULT
help
Interrupt controller device initialization priority.
module = INTC
module-str = intc
source "subsys/logging/Kconfig.template.log_config"
source "drivers/interrupt_controller/Kconfig.multilevel"
source "drivers/interrupt_controller/Kconfig.loapic"
source "drivers/interrupt_controller/Kconfig.dw"
source "drivers/interrupt_controller/Kconfig.it8xxx2"
source "drivers/interrupt_controller/Kconfig.stm32"
source "drivers/interrupt_controller/Kconfig.cavs"
source "drivers/interrupt_controller/Kconfig.rv32m1"
source "drivers/interrupt_controller/Kconfig.sam0"
source "drivers/interrupt_controller/Kconfig.gic"
source "drivers/interrupt_controller/Kconfig.npcx"
source "drivers/interrupt_controller/Kconfig.intel_vtd"
source "drivers/interrupt_controller/Kconfig.esp32"
source "drivers/interrupt_controller/Kconfig.esp32c3"
source "drivers/interrupt_controller/Kconfig.xec"
source "drivers/interrupt_controller/Kconfig.clic"
source "drivers/interrupt_controller/Kconfig.gd32_exti"
source "drivers/interrupt_controller/Kconfig.plic"
source "drivers/interrupt_controller/Kconfig.nxp_s32"
source "drivers/interrupt_controller/Kconfig.xmc4xxx"
endmenu