Wilfried Chauveau 3e6dd56133 arch: arm: cortex_m: make reading tls pointer faster on v7m and v8m.main ... Encoding T3 allows for an offset of up to 12bits in size allowing for a single instruction instead of 3. Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>		2025-02-08 10:09:10 +01:00
..
arc	arch: arc: Rename _Fault to z_arc_fault	2025-01-28 23:42:06 +01:00
arm	arch: arm: cortex_m: make reading tls pointer faster on v7m and v8m.main	2025-02-08 10:09:10 +01:00
arm64	arch: arm64: remove CONFIG_ARM64_ENABLE_FRAME_POINTER	2025-01-23 16:32:36 +01:00
common	arch: remove CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION	2025-01-23 16:32:36 +01:00
mips	arch: mips: Rename _Fault to z_mips_fault	2025-01-28 23:42:06 +01:00
nios2	arch: nios2: Rename _Fault to z_nios2_fault	2025-01-28 23:42:06 +01:00
posix
riscv	arch/riscv: add Zaamo and Zlrsc extension subsets	2025-02-05 17:49:13 +01:00
sparc
x86	toolchain: x86: Broken -Os detection in ia32.cmake	2025-02-06 03:16:07 +01:00
xtensa
archs.yml
CMakeLists.txt
Kconfig
Kconfig.v1
Kconfig.v2