zephyr/arch/xtensa
Savinay Dharmappa 6701d44967 dts: xtensa: Fix build error due to dts changes for ns16550 driver.
patch add clock frequency and interrupt property to uart
node in intel_s1000.dtsi. Include soc.h after types.h to
prevent build error.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 08:51:59 -04:00
..
core arch: xtensa: set __start as entry point for Xtensa. 2018-05-01 16:46:41 -04:00
include xtensa: fix CONFIG_INIT_STACKS for IRQ stack 2018-05-16 12:06:31 -07:00
soc dts: xtensa: Fix build error due to dts changes for ns16550 driver. 2018-05-22 08:51:59 -04:00
CMakeLists.txt arch: architecture defines kernel entry 2017-12-27 14:16:08 -05:00
Kconfig kconfig: Make 'source' non-globbing and use 'gsource' 2018-05-08 11:14:12 +02:00