Everything I can find as a reference says that the LP-SRAM block on
these devices is 64kb, and direct experimentation with cAVS 1.5 and
2.5 agrees. Access to areas beyond 64k hangs the DSP (it should cause
a PIF fault I guess, but the exception never gets trapped, that's
probably a different problem).
Fix this in devicetree to reflect what actually works. It's not clear
where the 128k values came from; if they're not typos we can correct
that when we find better docs.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
9eca65deca