zephyr/boards
Andy Ross 1a2fecec6d soc/intel_adsp: Unify Xtensa CPU reset between cores
Startup on these devices was sort of a mess, with multiple variants of
Xtensa and platform initialization code from multiple ancestries being
invoked at different places for different purposes.  Just use one code
path for everyone.

Bootloader entry starts with a minimal assembly stub that simply sets
WINDOW{START,BASE}, PS and a stack pointer and then jumps to C code.
That then uses the cpu_early_init() implementation from cAVS 2.5's
secondary cores to finish Xtensa initialization, and then flows
directly into the pre-existing bootloader C code to initialize cache
and memory and copy the HP-SRAM image, then it invokes Zephyr via a
simple C function call to z_cstart().

Likewise, remove the "reset vector" from Zephyr.  This was never a
reset vector, reset on these devices goes to a fixed address in a ROM.
CPU initialization is handled explicitly and completely in the
bootloader now, in a way that can be unified between the main and
secondary cores.  Entry from the bootloader now goes directly into
z_cstart() via a C call (via a single jump instruction placed at the
entry point address -- that's going away soon too once we're using a
unified link).

Now that vector table initialization happens in a uniform way, there's
no need to copy the VECBASE value during arch_start_cpu().

Finally note that this also reverts the
CONFIG_RESET_VECTOR_IN_BOOTLOADER kconfig variable added for these
platforms, because it's no longer a tunable and true always.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-12-14 18:43:05 -06:00
..
arc drivers: gpio: Refactor drivers to use shared init priority 2021-11-15 14:38:55 -05:00
arm boards: nucleo_wb55rg: Add stm32cubeprogrammer runner 2021-12-14 11:00:37 -06:00
arm64 arm64: xenvm: doc: update Xen VM docs with new features 2021-12-07 12:15:38 -05:00
common scripts: runners: Add west flash command for B91 platform 2021-12-06 07:28:38 -05:00
nios2 cmake: support multiple entries in board.cmake 2021-11-12 21:33:42 -05:00
posix drivers: display_sdl: rework to obtain configuration from devicetree 2021-12-10 12:47:30 +01:00
riscv soc: riscv: esp32c3: dts: uart node refactoring 2021-12-09 19:57:10 -05:00
shields boards: remove options LVGL_HOR_RES_MAX and LVGL_VER_RES_MAX 2021-12-10 12:47:30 +01:00
sparc cmake: support multiple entries in board.cmake 2021-11-12 21:33:42 -05:00
x86 cmake: support multiple entries in board.cmake 2021-11-12 21:33:42 -05:00
xtensa soc/intel_adsp: Unify Xtensa CPU reset between cores 2021-12-14 18:43:05 -06:00
CMakeLists.txt
deprecated.cmake boards: arm: bt610: Rename from bt6x0 2021-10-28 13:53:21 -04:00
index.rst
Kconfig cmake: boards: make QEMU icount sleep parameter configurable 2021-10-28 15:26:50 +02:00