Carlo Caione 6503795dc1 riscv: Introduce BitManip extensions ... Add Zba, Zbb, Zbc and Zbs BitManip extensions. Signed-off-by: Carlo Caione <ccaione@baylibre.com>		2022-08-29 16:57:18 +02:00
..
core	arch: riscv: Align semihost_exec function at 16-byte boundary	2022-08-08 10:52:34 +02:00
include	riscv: Introduce RISCV_ALWAYS_SWITCH_THROUGH_ECALL	2022-07-04 18:18:10 +02:00
CMakeLists.txt
Kconfig	riscv: Use IRQ vector table for vectored mode	2022-07-07 10:00:20 +02:00
Kconfig.core	riscv: Introduce Zicsr and Zifencei extensions	2022-08-29 16:57:18 +02:00
Kconfig.isa	riscv: Introduce BitManip extensions	2022-08-29 16:57:18 +02:00