zephyr/soc
Jun Lin 82a887c98d driver: eSPI: npcx: support multiple bytes mode for Port80
eSPI PUT_IOWR_SHORT protocol can send 1/2/4 bytes of data in a single
transaction. This allows the host to send max 32-bits Port80 code
at one time. This CL sets bits OFS0_SEL~OFS3_SEL in the DPAR1 register
to let the EC hardware put the full Port80 code to DP80BUF FIFO.
It also groups the N-byte code into a single 32-bits variable when
necessary by analyzing the offset field in the DP80BUF register.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-10-20 15:41:22 +02:00
..
arc smp: Kconfig: Move to using MP_MAX_NUM_CPUS 2022-10-20 22:04:10 +09:00
arm driver: eSPI: npcx: support multiple bytes mode for Port80 2022-10-20 15:41:22 +02:00
arm64 boards: fvp_baser_aemv8r: remove SOC_FVP_AEMV8R_EL2_INIT code 2022-10-12 18:46:49 +09:00
mips
nios2
posix
riscv smp: Kconfig: Move to using MP_MAX_NUM_CPUS 2022-10-20 22:04:10 +09:00
sparc
x86
xtensa smp: Convert #if to use CONFIG_MP_MAX_NUM_CPUS 2022-10-20 22:04:10 +09:00
Kconfig