Gerard Marull-Paretas 4a0ce0c62a dts: x86: intel: ia32: fix uart reg-shift ... Platforms that enable UART_NS16550_ACCESS_IOPORT (the case for ia32) require reg-shift to be zero. Fix this issue introduced in 4c8a8149de. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>		2022-06-17 10:45:28 -05:00
..
arc/synopsys	dts: add reg-shift property to all ns16550 devices	2022-06-15 16:59:02 -05:00
arm	dts: arm/arm64: remove DTS 'label' property requirement from gic and timer	2022-06-16 09:48:12 -05:00
arm64	dts: arm/arm64: remove DTS 'label' property requirement from gic and timer	2022-06-16 09:48:12 -05:00
bindings	dts: arm/arm64: remove DTS 'label' property requirement from gic and timer	2022-06-16 09:48:12 -05:00
common
nios2/intel	dts: add reg-shift property to all ns16550 devices	2022-06-15 16:59:02 -05:00
posix
riscv	dts: bindings: riscv: Don't use riscv, prefix for vendor compat	2022-06-16 11:26:25 +02:00
sparc/gaisler	dts: sparc: gaisler: Move SoC devicetree includes under a vendor dir	2022-05-09 17:54:48 -04:00
x86/intel	dts: x86: intel: ia32: fix uart reg-shift	2022-06-17 10:45:28 -05:00
xtensa	boards: intel_s1000_crb: remove board/soc	2022-06-13 16:19:51 -04:00
binding-template.yaml
Kconfig	drivers: gpio: remove unused HAS_DTS_GPIO Kconfig symbol	2022-06-10 09:47:31 +02:00