zephyr/dts
Youssef Zini 898eaa9a3f dts: arm: st: stm32mp25*_m33.dtsi: add init dtsi
Add the initial device tree source include (dtsi) files for the
stm32mp25 series boards, covering non-secure configuration for zephyr on
the Cortex-M33 core.
These files provide the basic hardware description, including CPU
(Cortex-M33), memory, RCC clock controller and NVIC interrupt
controller.

Key features:
- Set flash and RAM addresses to DDR memory.
- Adjust RCC peripheral address for non-secure context.

Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
2025-06-17 08:20:33 +02:00
..
arc/synopsys
arm dts: arm: st: stm32mp25*_m33.dtsi: add init dtsi 2025-06-17 08:20:33 +02:00
arm64 dts: nxp: imx95_a55: add GPIO device nodes 2025-06-17 07:21:32 +02:00
bindings drivers/sensor/: lis2dux12: support FIFO modes 2025-06-17 07:23:23 +02:00
common
posix
riscv drivers/espi: ite: Add it51xxx compatibility with it8xxx2 support retained 2025-06-16 14:12:44 +02:00
rx/renesas drivers: spi: Initial support SPI driver on Renesas RX130 2025-06-09 08:55:05 +02:00
sparc/gaisler
vendor dts: nordic: Add channels property for local DPPI 2025-06-13 07:36:19 +02:00
x86/intel dts: x86: intel: Corrected dev-id of SMBUS 2025-05-09 01:40:09 +02:00
xtensa soc: espressif: convert rtc peripheral to clock subsystem 2025-06-02 17:38:08 +02:00
binding-template.yaml
Kconfig