64a3159dee
Making context switch cache-coherent in SMP is hard. The KERNEL_COHERENCE handling was conservatively invalidating the stack region of a thread that was being switched in. This was because it might have (1) run on this CPU in the past, but (2) run most recently on a different CPU. In that case we might have stale data still in our local dcache! But this has performance impact in the (very common!) case of a thread being switched out briefly and then back in (e.g. k_sleep() for a small duration). It will come back having lost all of its cached stack context, and will have to fetch all that information back from shared SRAM! Treat this by tracking a "last_cpu" for each thread in the arch part of the thread struct. If we're coming back to the same CPU we left, we know we can skip the invalidate. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
||
|---|---|---|
| .. | ||
| zephyr | ||