zephyr/soc
Lauren Murphy c1711997bc debug: coredump: add xtensa coredump
Adds Xtensa as supported architecture for coredump. Fixes
a few typos in documentation, Kconfig and a C file. Dumps
minimal set of registers shown by 'info registers' in GDB
for the sample_controller and ESP32 SOCs. Updates tests.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2021-12-14 07:40:55 -05:00
..
arc soc: arc: fix ARC_HAS_ACCL_REGS settings 2021-12-02 11:32:14 -06:00
arm soc: mimxrt685_evk: Fix usdhc driver build failure 2021-12-13 20:30:06 -05:00
arm64 xenvm: switch to Xen PV console instead of PL011 SBSA 2021-10-29 15:23:33 +02:00
nios2
posix posix: Add missing include 2021-04-27 13:17:36 -04:00
riscv linker: remove manual name specification 2021-12-09 16:23:03 +01:00
sparc
x86 bluetooth: remove Kconfig options CONFIG_BT_*_ON_DEV_NAME 2021-08-25 18:05:17 -04:00
xtensa debug: coredump: add xtensa coredump 2021-12-14 07:40:55 -05:00
Kconfig kconfig: soc and shield cleanup 2021-06-11 16:13:22 +02:00