71ce8ceb18
* z_NanoFatalErrorHandler() is now moved to common kernel code and renamed z_fatal_error(). Arches dump arch-specific info before calling. * z_SysFatalErrorHandler() is now moved to common kernel code and renamed k_sys_fatal_error_handler(). It is now much simpler; the default policy is simply to lock interrupts and halt the system. If an implementation of this function returns, then the currently running thread is aborted. * New arch-specific APIs introduced: - z_arch_system_halt() simply powers off or halts the system. * We now have a standard set of fatal exception reason codes, namespaced under K_ERR_* * CONFIG_SIMPLE_FATAL_ERROR_HANDLER deleted * LOG_PANIC() calls moved to k_sys_fatal_error_handler() Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
104 lines
2.9 KiB
C
104 lines
2.9 KiB
C
/*
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* Copyright (c) 2016 Cadence Design Systems, Inc.
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Xtensa specific kernel interface header
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* This header contains the Xtensa specific kernel interface. It is included
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* by the generic kernel interface header (include/arch/cpu.h)
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_XTENSA_ARCH_H_
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#define ZEPHYR_INCLUDE_ARCH_XTENSA_ARCH_H_
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#include <irq.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <generated_dts_board.h>
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#if !defined(_ASMLANGUAGE) && !defined(__ASSEMBLER__)
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#include <arch/common/sys_io.h>
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#include <arch/common/ffs.h>
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#include <zephyr/types.h>
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#include <sw_isr_table.h>
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#include <arch/xtensa/irq.h>
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#include <xtensa/config/core.h>
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#include <arch/common/addr_types.h>
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#define STACK_ALIGN 16
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/* Xtensa GPRs are often designated by two different names */
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#define sys_define_gpr_with_alias(name1, name2) union { u32_t name1, name2; }
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#include <arch/xtensa/exc.h>
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/* internal routine documented in C file, needed by IRQ_CONNECT() macro */
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extern void z_irq_priority_set(u32_t irq, u32_t prio, u32_t flags);
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/**
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* Configure a static interrupt.
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*
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* All arguments must be computable by the compiler at build time; if this
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* can't be done use irq_connect_dynamic() instead.
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*
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* Internally this function does a few things:
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*
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* 1. The enum statement has no effect but forces the compiler to only
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* accept constant values for the irq_p parameter, very important as the
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* numerical IRQ line is used to create a named section.
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*
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* 2. An instance of _isr_table_entry is created containing the ISR and its
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* parameter. If you look at how _sw_isr_table is created, each entry in the
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* array is in its own section named by the IRQ line number. What we are doing
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* here is to override one of the default entries (which points to the
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* spurious IRQ handler) with what was supplied here.
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*
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* 3. The priority level for the interrupt is configured by a call to
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* z_irq_priority_set()
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*
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* @param irq_p IRQ line number
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* @param priority_p Interrupt priority
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* @param isr_p Interrupt service routine
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* @param isr_param_p ISR parameter
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* @param flags_p IRQ options
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*
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* @return The vector assigned to this interrupt
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*/
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#define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
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({ \
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Z_ISR_DECLARE(irq_p, flags_p, isr_p, isr_param_p); \
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irq_p; \
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})
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/* Spurious interrupt handler. Throws an error if called */
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extern void z_irq_spurious(void *unused);
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#ifdef CONFIG_XTENSA_ASM2
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#define XTENSA_ERR_NORET /**/
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#else
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#define XTENSA_ERR_NORET FUNC_NORETURN
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#endif
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extern u32_t z_timer_cycle_get_32(void);
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#define z_arch_k_cycle_get_32() z_timer_cycle_get_32()
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/**
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* @brief Explicitly nop operation.
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*/
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static ALWAYS_INLINE void arch_nop(void)
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{
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__asm__ volatile("nop");
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}
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#endif /* !defined(_ASMLANGUAGE) && !defined(__ASSEMBLER__) */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_INCLUDE_ARCH_XTENSA_ARCH_H_ */
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