5d736766ed
by adding the soc specific files such: soc initialization code, linker scripts and support for esp32c3 devkitm Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com> Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
65 lines
1.7 KiB
C
65 lines
1.7 KiB
C
/*
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* Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <soc/soc_caps.h>
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#include <soc/soc.h>
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#include <soc/interrupt_core0_reg.h>
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#include <soc/periph_defs.h>
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#include <soc/system_reg.h>
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#include <hal/systimer_hal.h>
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#include <hal/systimer_ll.h>
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#include <rom/ets_sys.h>
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#include <esp_attr.h>
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#include <drivers/timer/system_timer.h>
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#include <sys_clock.h>
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#include <soc.h>
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#define SYS_TIMER_CPU_IRQ 1
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static void sys_timer_isr(const void *arg)
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{
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ARG_UNUSED(arg);
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systimer_ll_clear_alarm_int(SYSTIMER_ALARM_0);
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sys_clock_announce(1);
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}
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int sys_clock_driver_init(const struct device *dev)
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{
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ARG_UNUSED(dev);
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esp32c3_rom_intr_matrix_set(0, ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE, SYS_TIMER_CPU_IRQ);
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IRQ_CONNECT(SYS_TIMER_CPU_IRQ, 0, sys_timer_isr, NULL, 0);
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irq_enable(SYS_TIMER_CPU_IRQ);
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systimer_hal_init();
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systimer_hal_connect_alarm_counter(SYSTIMER_ALARM_0, SYSTIMER_COUNTER_1);
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systimer_hal_enable_counter(SYSTIMER_COUNTER_1);
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systimer_hal_counter_can_stall_by_cpu(SYSTIMER_COUNTER_1, 0, true);
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systimer_hal_set_alarm_period(SYSTIMER_ALARM_0,
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC / CONFIG_SYS_CLOCK_TICKS_PER_SEC);
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systimer_hal_select_alarm_mode(SYSTIMER_ALARM_0, SYSTIMER_ALARM_MODE_PERIOD);
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systimer_hal_enable_alarm_int(SYSTIMER_ALARM_0);
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return 0;
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}
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void sys_clock_set_timeout(int32_t ticks, bool idle)
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{
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ARG_UNUSED(idle);
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ARG_UNUSED(ticks);
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}
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uint32_t sys_clock_elapsed(void)
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{
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/* Tickless is not supported yet */
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return 0;
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}
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uint32_t sys_clock_cycle_get_32(void)
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{
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return systimer_ll_get_counter_value_low(SYSTIMER_COUNTER_1);
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}
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