Zephyr SPI driver model for full-duplex operation assumes data will be transmitted and received during each clock period. The QMSPI driver for the XEC family also supported dual and quad I/O use cases which are inherently half-duplex. To support dual/quad the driver incorrectly processed spi buffers as all transmit buffers first then all receive buffers. This worked if only the SPI driver was used. It did not work with the Zephyr flash SPI NOR driver which assumes SPI drivers follow the SPI driver model. This commit implements a QMSPI driver that follows the Zephyr SPI driver model resulting in a slightly smaller driver. Dual/quad SPI transactions are supported if the experimental SPI extended mode Zephyr configuration flag is enabled. We also remove the QMSPI full duplex driver added previously to support the flash SPI NOR driver. Added board to spi loop-back test and spi_flash sample. Signed-off-by: Scott Worley <scott.worley@microchip.com> |
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| arc/synopsys | ||
| arm | ||
| arm64 | ||
| bindings | ||
| common | ||
| nios2/intel | ||
| posix | ||
| riscv | ||
| sparc/gaisler | ||
| x86/intel | ||
| xtensa | ||
| binding-template.yaml | ||
| Kconfig | ||