ef224ce1cd
Make the assembly codes compatible with both GNU and Metaware toolchain. * replace ".balign" with ".align" ".align" assembler directive is supposed by all ARC toolchains and it is implemented in a same way across ARC toolchains. * replace "mov_s __certain_reg" with "mov __certain_reg" Even though GCC encodes those mnemonics and even real HW executes them according to PRM these are restricted ones for mov_s and CCAC rightfully refuses to accept such mnemonics. So for compatibility and clarity sake we switch to 32-bit mov instruction which allows use of all those instructions. * Add "%%" prefix while accessing registers from inline ASM as it is required by MWDT. * Drop "@" prefix while accessing symbols (defined in C code) from ASM code as it is required by MWDT. Signed-off-by: Wayne Ren <wei.ren@synopsys.com> /#
45 lines
813 B
C
45 lines
813 B
C
/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief ARCv2 public error handling
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*
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* ARC-specific kernel error handling interface. Included by arc/arch.h.
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_ERROR_H_
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#define ZEPHYR_INCLUDE_ARCH_ARC_V2_ERROR_H_
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#include <arch/arc/syscall.h>
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#include <arch/arc/v2/exc.h>
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* use trap_s to raise a SW exception
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*/
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#define ARCH_EXCEPT(reason_p) do { \
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__asm__ volatile ( \
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"mov %%r0, %[reason]\n\t" \
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"trap_s %[id]\n\t" \
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: \
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: [reason] "i" (reason_p), \
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[id] "i" (_TRAP_S_CALL_RUNTIME_EXCEPT) \
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: "memory"); \
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CODE_UNREACHABLE; \
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} while (false)
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_INCLUDE_ARCH_ARC_V2_ERROR_H_ */
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