Update the existing driver to support STM32G0 series.
It enables the DMA_STM32_SHARED_IRQS flag for g0 series, such that
all interrupts are handled in a shared isr to avoid irq conflicts.
The shared isr is extended to be able to handle irqs from more than one
dma instance.
Furthermore the config_irq function of instance 1, which connects to the
irqs, was reworked to avoid irq conflicts when 2 dma instances on
stm32f0, or stm32g0 are enabled:
While dma1 has one exclusive irq for channel 1, and one irq for dma1
channels 2 and 3, all other channels share the same irq.
Therefore it is currently not possible to enable dma2 without enabling
dma1 at the same time, without getting an build errror due to an irq
conflict.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
5a475d7cc2