Yang Jialong 5a3f0b9506 arch: riscv64: smp: get msip base address from dts ... In most implements, the msip base address is 0x2000000. But the address is not fixed in all boards. Signed-off-by: Yang Jialong <yangjialong@vcore.com>		2024-11-27 06:58:57 -05:00
..
arc	arch: deprecate _current	2024-11-23 20:12:24 -05:00
arm	arch: arm: cortex_a_r: add Kconfig options for cache segregation	2024-11-26 15:43:45 -05:00
arm64	arch: deprecate _current	2024-11-23 20:12:24 -05:00
common	arch: common: fix copy for ramfunc region during XIP init	2024-11-06 10:19:08 -08:00
mips	init: support per-core init hook	2024-11-16 14:04:25 -05:00
nios2	init: support per-core init hook	2024-11-16 14:04:25 -05:00
posix	posix: fpu: Fix compiler error when enabling fpu on posix boards	2024-11-25 21:50:58 +01:00
riscv	arch: riscv64: smp: get msip base address from dts	2024-11-27 06:58:57 -05:00
sparc	SPARC: Add support for single-vector trapping (SVT)	2024-11-25 21:53:55 +01:00
x86	arch: deprecate _current	2024-11-23 20:12:24 -05:00
xtensa	arch: deprecate _current	2024-11-23 20:12:24 -05:00
archs.yml	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00
CMakeLists.txt	cmake: enable -Wshadow partially for in-tree code	2023-08-22 11:39:58 +02:00
Kconfig	arch: add new interfaces to set/get the current thread of current CPU	2024-11-23 20:12:24 -05:00
Kconfig.v1	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00
Kconfig.v2	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00